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authorOlof Johansson <olof@lixom.net>2019-06-26 19:22:19 -0700
committerOlof Johansson <olof@lixom.net>2019-06-26 19:22:19 -0700
commit3395a968e5903f7852235cbc615ebc97f1615487 (patch)
tree359331eb3a92b189cc18213ce5aea41804ce12a2
parent2bfd84b3a548a8eda8676a0b6bc4d471a6f6b812 (diff)
parentaa38571246c6ac279ebebd141157297bcb959d76 (diff)
downloadlinux-3395a968e5903f7852235cbc615ebc97f1615487.tar.bz2
Merge tag 'uniphier-dt64-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM64 SoC DT updates for v5.3 - Migrate to the new binding for the Denali NAND controller - Use reserved-memory node instead of /memreserve/ for the secure memory area * tag 'uniphier-dt64-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: add reserved-memory for secure memory arm64: dts: uniphier: update to new Denali NAND binding Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts4
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi15
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi15
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts4
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi15
5 files changed, 47 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
index 7968d524351b..f72f048a0c9d 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
@@ -163,4 +163,8 @@
&nand {
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ };
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index a3cd475b48d2..8ec40a0b8b1e 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -8,8 +8,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
-/memreserve/ 0x80000000 0x02000000;
-
/ {
compatible = "socionext,uniphier-ld11";
#address-cells = <2>;
@@ -110,6 +108,17 @@
<1 10 4>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secure-memory@81000000 {
+ reg = <0x0 0x81000000 0x0 0x01000000>;
+ no-map;
+ };
+ };
+
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -617,6 +626,8 @@
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 017f6328c191..b658f2b641e2 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -9,8 +9,6 @@
#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/thermal/thermal.h>
-/memreserve/ 0x80000000 0x02000000;
-
/ {
compatible = "socionext,uniphier-ld20";
#address-cells = <2>;
@@ -215,6 +213,17 @@
};
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secure-memory@81000000 {
+ reg = <0x0 0x81000000 0x0 0x01000000>;
+ no-map;
+ };
+ };
+
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -921,6 +930,8 @@
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index 1965e4dfe4a4..754315bbd1c8 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -115,4 +115,8 @@
&nand {
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ };
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index bb97abe1a55f..d6f6cee4d549 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -8,8 +8,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
-/memreserve/ 0x80000000 0x02000000;
-
/ {
compatible = "socionext,uniphier-pxs3";
#address-cells = <2>;
@@ -138,6 +136,17 @@
<1 10 4>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secure-memory@81000000 {
+ reg = <0x0 0x81000000 0x0 0x01000000>;
+ no-map;
+ };
+ };
+
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -779,6 +788,8 @@
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;