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authorMason Yang <masonccyang@mxic.com.tw>2018-10-17 10:08:12 +0800
committerMark Brown <broonie@kernel.org>2018-11-05 11:55:14 +0000
commit326e5c8d4a87512ee329efc1b45029767ec710bb (patch)
tree6a94da89d24fccfa1b70bdbc93975ace082dde2b
parentb942d80b0a394e8ea18fce3b032b4700439e8ca3 (diff)
downloadlinux-326e5c8d4a87512ee329efc1b45029767ec710bb.tar.bz2
dt-binding: spi: Document Macronix controller bindings
Document the bindings used by the Macronix controller. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/spi/spi-mxic.txt34
1 files changed, 34 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-mxic.txt b/Documentation/devicetree/bindings/spi/spi-mxic.txt
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index 000000000000..529f2dab2648
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+++ b/Documentation/devicetree/bindings/spi/spi-mxic.txt
@@ -0,0 +1,34 @@
+Macronix SPI controller Device Tree Bindings
+--------------------------------------------
+
+Required properties:
+- compatible: should be "mxicy,mx25f0a-spi"
+- #address-cells: should be 1
+- #size-cells: should be 0
+- reg: should contain 2 entries, one for the registers and one for the direct
+ mapping area
+- reg-names: should contain "regs" and "dirmap"
+- interrupts: interrupt line connected to the SPI controller
+- clock-names: should contain "ps_clk", "send_clk" and "send_dly_clk"
+- clocks: should contain 3 entries for the "ps_clk", "send_clk" and
+ "send_dly_clk" clocks
+
+Example:
+
+ spi@43c30000 {
+ compatible = "mxicy,mx25f0a-spi";
+ reg = <0x43c30000 0x10000>, <0xa0000000 0x20000000>;
+ reg-names = "regs", "dirmap";
+ clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 18>;
+ clock-names = "send_clk", "send_dly_clk", "ps_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+ };