diff options
| author | Xing Zheng <zhengxing@rock-chips.com> | 2016-01-07 20:17:35 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-01-16 16:01:21 +0100 |
| commit | c40519350e1d7db03e35e57509352c55948648ba (patch) | |
| tree | e689c5381af6075714c20808f86671b3887edc2a | |
| parent | b29de2de5049e064d172862b1feeddeb650c3ee8 (diff) | |
| download | linux-c40519350e1d7db03e35e57509352c55948648ba.tar.bz2 | |
clk: rockchip: rk3036: fix the div offset for emac clock
Due to reference to old version TRM, there are incorrect emac clock node.
The SEL_21_9 is used for the parent div, the SEL_21_4 is used for the
child div.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3036.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index 04b5249bcf0b..1f00fab72dfb 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -344,12 +344,12 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { RK2928_CLKGATE_CON(10), 5, GFLAGS), COMPOSITE_NOGATE(0, "mac_pll_src", mux_pll_src_3plls_p, 0, - RK2928_CLKSEL_CON(21), 0, 2, MFLAGS, 4, 5, DFLAGS), + RK2928_CLKSEL_CON(21), 0, 2, MFLAGS, 9, 5, DFLAGS), MUX(SCLK_MACREF, "mac_clk_ref", mux_mac_p, CLK_SET_RATE_PARENT, RK2928_CLKSEL_CON(21), 3, 1, MFLAGS), COMPOSITE_NOMUX(SCLK_MAC, "mac_clk", "mac_clk_ref", 0, - RK2928_CLKSEL_CON(21), 9, 5, DFLAGS, + RK2928_CLKSEL_CON(21), 4, 5, DFLAGS, RK2928_CLKGATE_CON(2), 6, GFLAGS), MUX(SCLK_HDMI, "dclk_hdmi", mux_dclk_p, 0, |