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authorSameer Pujar <spujar@nvidia.com>2019-01-14 23:51:11 +0530
committerTakashi Iwai <tiwai@suse.de>2019-01-14 19:52:28 +0100
commit9b6f7e7a296e17990aae298c809b001e99ddd151 (patch)
treefecb9b477ccba5965b03e6418add0157a80fa029
parentb59c8e7a73160b11f99b9008a5f215dd54b9d581 (diff)
downloadlinux-9b6f7e7a296e17990aae298c809b001e99ddd151.tar.bz2
ALSA: hda: program stripe bits for controller
Platforms having multiple SORs and hdmi/dp sinks require higher bandwidth to support simultaneous playbacks of higher resolution. If hda controller supports multiple SDO lines, STRIPE can be used to indicate how many of the SDO lines the stream should be striped across. During stream start stripe control bits are programmed to use given number of sdo lines and the same is cleared during stream stop. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Mohan Kumar D <mkumard@nvidia.com> Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
-rw-r--r--sound/hda/hdac_stream.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c
index 820694a2061e..f5dd288d1a7a 100644
--- a/sound/hda/hdac_stream.c
+++ b/sound/hda/hdac_stream.c
@@ -82,6 +82,7 @@ EXPORT_SYMBOL_GPL(snd_hdac_stream_init);
void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start)
{
struct hdac_bus *bus = azx_dev->bus;
+ int stripe_ctl;
trace_snd_hdac_stream_start(bus, azx_dev);
@@ -93,6 +94,10 @@ void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start)
snd_hdac_chip_updatel(bus, INTCTL,
1 << azx_dev->index,
1 << azx_dev->index);
+ /* set stripe control */
+ stripe_ctl = snd_hdac_get_stream_stripe_ctl(bus, azx_dev->substream);
+ snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK,
+ stripe_ctl);
/* set DMA start and interrupt mask */
snd_hdac_stream_updateb(azx_dev, SD_CTL,
0, SD_CTL_DMA_START | SD_INT_MASK);
@@ -109,6 +114,7 @@ void snd_hdac_stream_clear(struct hdac_stream *azx_dev)
snd_hdac_stream_updateb(azx_dev, SD_CTL,
SD_CTL_DMA_START | SD_INT_MASK, 0);
snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */
+ snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK, 0);
azx_dev->running = false;
}
EXPORT_SYMBOL_GPL(snd_hdac_stream_clear);