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authorKevin Wang <kevin1.wang@amd.com>2021-08-11 16:10:26 +0800
committerAlex Deucher <alexander.deucher@amd.com>2021-08-16 15:17:51 -0400
commit1d0e622f8db264240086dc13e3018b5802e8df18 (patch)
tree5b0af280e49233db2e0fe05cc57cd15b202f53e4
parentbecf6c95523a69c2807fdfda2d27b40432d8d75a (diff)
downloadlinux-1d0e622f8db264240086dc13e3018b5802e8df18.tar.bz2
drm/amd/pm: change pp_dpm_sclk/mclk/fclk attribute is RO for aldebaran
the following clock is only support voltage DPM, change attribute to RO: 1. pp_dpm_sclk 2. pp_dpm_mclk 3. pp_dpm_fclk Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/pm/amdgpu_pm.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 4ee5d4d6aa7e..221aff24029a 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -2094,14 +2094,19 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
*states = ATTR_STATE_UNSUPPORTED;
}
- if (asic_type == CHIP_ARCTURUS) {
- /* Arcturus does not support standalone mclk/socclk/fclk level setting */
+ switch (asic_type) {
+ case CHIP_ARCTURUS:
+ case CHIP_ALDEBARAN:
+ /* the Mi series card does not support standalone mclk/socclk/fclk level setting */
if (DEVICE_ATTR_IS(pp_dpm_mclk) ||
DEVICE_ATTR_IS(pp_dpm_socclk) ||
DEVICE_ATTR_IS(pp_dpm_fclk)) {
dev_attr->attr.mode &= ~S_IWUGO;
dev_attr->store = NULL;
}
+ break;
+ default:
+ break;
}
if (DEVICE_ATTR_IS(pp_dpm_dcefclk)) {