diff options
| author | Michael Straube <straube.linux@gmail.com> | 2021-11-28 18:09:20 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-12-03 15:13:36 +0100 |
| commit | 3a8482bc23addd7806d374d72c1bcf8927e1e0f1 (patch) | |
| tree | 34dfd5b309e9a8eba90e1e39f692127ddfebe2f3 | |
| parent | 2f43a4e87a7b82d62778236bd71c18347a2e91bb (diff) | |
| download | linux-3a8482bc23addd7806d374d72c1bcf8927e1e0f1.tar.bz2 | |
staging: r8188eu: remove rf_type from writeOFDMPowerReg88E()
pHalData->rf_type is always RF_1T1R. Remove unnecessary checks from
writeOFDMPowerReg88E().
Signed-off-by: Michael Straube <straube.linux@gmail.com>
Link: https://lore.kernel.org/r/20211128170924.5874-7-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/staging/r8188eu/hal/rtl8188e_rf6052.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c index 946a1b97d96f..813dd938c817 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c @@ -272,7 +272,6 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel, } static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, @@ -302,10 +301,7 @@ static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue) PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal); /* 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. */ - if (((pHalData->rf_type == RF_2T2R) && - (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs15_Mcs12)) || - ((pHalData->rf_type != RF_2T2R) && - (regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04))) { + if (regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04) { writeVal = pwr_val[3]; if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_A_Mcs07_Mcs04) regoffset = 0xc90; |