summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorIra Weiny <ira.weiny@intel.com>2021-06-17 15:16:20 -0700
committerDan Williams <dan.j.williams@intel.com>2021-08-10 18:50:04 -0700
commitceeb0da0a0322bcba4c50ab3cf97fe9a7aa8a2e4 (patch)
tree63acdbbc03bcf7d37de09a74922de3d290ca2866
parentf847502ad8e3299e7ad256aa0bd7eaf184646117 (diff)
downloadlinux-ceeb0da0a0322bcba4c50ab3cf97fe9a7aa8a2e4.tar.bz2
cxl/mem: Adjust ram/pmem range to represent DPA ranges
CXL spec defines the volatile DPA range to be 0 to Volatile memory size. It further defines the persistent DPA range to follow directly after the end of the Volatile DPA through the persistent memory size. Essentially Volatile DPA range = [0, Volatile size) Persistent DPA range = [Volatile size, Volatile size + Persistent size) Adjust the pmem_range start to reflect this and remote the TODO. Signed-off-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20210617221620.1904031-4-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
-rw-r--r--drivers/cxl/pci.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 3f5db8960098..651e8d4ec974 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -1441,8 +1441,9 @@ static int cxl_mem_create_range_info(struct cxl_mem *cxlm)
if (cxlm->partition_align_bytes == 0) {
cxlm->ram_range.start = 0;
cxlm->ram_range.end = cxlm->volatile_only_bytes - 1;
- cxlm->pmem_range.start = 0;
- cxlm->pmem_range.end = cxlm->persistent_only_bytes - 1;
+ cxlm->pmem_range.start = cxlm->volatile_only_bytes;
+ cxlm->pmem_range.end = cxlm->volatile_only_bytes +
+ cxlm->persistent_only_bytes - 1;
return 0;
}
@@ -1466,15 +1467,12 @@ static int cxl_mem_create_range_info(struct cxl_mem *cxlm)
cxlm->next_volatile_bytes,
cxlm->next_persistent_bytes);
- /*
- * TODO: enumerate DPA map, as 'ram' and 'pmem' do not alias.
- * For now, only the capacity is exported in sysfs
- */
cxlm->ram_range.start = 0;
cxlm->ram_range.end = cxlm->active_volatile_bytes - 1;
- cxlm->pmem_range.start = 0;
- cxlm->pmem_range.end = cxlm->active_persistent_bytes - 1;
+ cxlm->pmem_range.start = cxlm->active_volatile_bytes;
+ cxlm->pmem_range.end = cxlm->active_volatile_bytes +
+ cxlm->active_persistent_bytes - 1;
return 0;
}