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authorDongdong Liu <liudongdong3@huawei.com>2021-03-30 21:43:19 +0800
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2021-03-30 17:03:13 +0100
commit52ab55dfe32357d5889eef2969a03dd662aa2b7d (patch)
tree14bce577826c28b9c9d071d0ce2c8d6a8a4c11d2
parent021a90fe60ea08262ad01f9c9d0514d63462b4a7 (diff)
downloadlinux-52ab55dfe32357d5889eef2969a03dd662aa2b7d.tar.bz2
dt-bindings: PCI: hisi: Delete the obsolete HiSilicon PCIe file
The hisilicon-pcie.txt file is no longer useful since commit c2fa6cf76d20 (PCI: dwc: hisi: Remove non-ECAM HiSilicon hip05/hip06 driver), so delete it and remove related code in MAINTAINERS file. Suggested-by: Zhou Wang <wangzhou1@hisilicon.com> Link: https://lore.kernel.org/r/1617111799-109749-1-git-send-email-liudongdong3@huawei.com Signed-off-by: Dongdong Liu <liudongdong3@huawei.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof WilczyƄski <kw@linux.com>
-rw-r--r--Documentation/devicetree/bindings/pci/hisilicon-pcie.txt43
-rw-r--r--MAINTAINERS1
2 files changed, 0 insertions, 44 deletions
diff --git a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt b/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
deleted file mode 100644
index d6796ef54ea1..000000000000
--- a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-HiSilicon Hip05 and Hip06 PCIe host bridge DT description
-
-HiSilicon PCIe host controller is based on the Synopsys DesignWare PCI core.
-It shares common functions with the PCIe DesignWare core driver and inherits
-common properties defined in
-Documentation/devicetree/bindings/pci/designware-pcie.txt.
-
-Additional properties are described here:
-
-Required properties
-- compatible: Should contain "hisilicon,hip05-pcie" or "hisilicon,hip06-pcie".
-- reg: Should contain rc_dbi, config registers location and length.
-- reg-names: Must include the following entries:
- "rc_dbi": controller configuration registers;
- "config": PCIe configuration space registers.
-- msi-parent: Should be its_pcie which is an ITS receiving MSI interrupts.
-- port-id: Should be 0, 1, 2 or 3.
-
-Optional properties:
-- status: Either "ok" or "disabled".
-- dma-coherent: Present if DMA operations are coherent.
-
-Hip05 Example (note that Hip06 is the same except compatible):
- pcie@b0080000 {
- compatible = "hisilicon,hip05-pcie", "snps,dw-pcie";
- reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>;
- reg-names = "rc_dbi", "config";
- bus-range = <0 15>;
- msi-parent = <&its_pcie>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- dma-coherent;
- ranges = <0x82000000 0 0x00000000 0x220 0x00000000 0 0x10000000>;
- num-lanes = <8>;
- port-id = <1>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0xf800 0 0 7>;
- interrupt-map = <0x0 0 0 1 &mbigen_pcie 1 10
- 0x0 0 0 2 &mbigen_pcie 2 11
- 0x0 0 0 3 &mbigen_pcie 3 12
- 0x0 0 0 4 &mbigen_pcie 4 13>;
- };
diff --git a/MAINTAINERS b/MAINTAINERS
index d92f85ca831d..8a154939ae27 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13899,7 +13899,6 @@ PCIE DRIVER FOR HISILICON
M: Zhou Wang <wangzhou1@hisilicon.com>
L: linux-pci@vger.kernel.org
S: Maintained
-F: Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
F: drivers/pci/controller/dwc/pcie-hisi.c
PCIE DRIVER FOR HISILICON KIRIN