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authorMichael Chan <michael.chan@broadcom.com>2020-05-04 04:50:36 -0400
committerDavid S. Miller <davem@davemloft.net>2020-05-04 10:44:11 -0700
commite93b30d56fc0670e508456afc59f16d70fe1f83f (patch)
tree243a2e477935fff59bf7d46bab54bb15d0e1509d
parentebdf73dc595b6711dbfaf3007d513909bd814940 (diff)
downloadlinux-e93b30d56fc0670e508456afc59f16d70fe1f83f.tar.bz2
bnxt_en: Set the db_offset on 57500 chips for the RDMA MSIX entries.
The driver provides completion ring or NQ doorbell offset for each MSIX entry requested by the RDMA driver. The NQ offset on 57500 chips is different than legacy chips. Set it correctly based on chip type for correctness. The RDMA driver is ignoring this field for the 57500 chips so it is not causing any problem. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c
index 4a316c4b3fa8..4b40778ac8dd 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c
@@ -104,7 +104,13 @@ static void bnxt_fill_msix_vecs(struct bnxt *bp, struct bnxt_msix_entry *ent)
for (i = 0; i < num_msix; i++) {
ent[i].vector = bp->irq_tbl[idx + i].vector;
ent[i].ring_idx = idx + i;
- ent[i].db_offset = (idx + i) * 0x80;
+ if (bp->flags & BNXT_FLAG_CHIP_P5) {
+ ent[i].db_offset = DB_PF_OFFSET_P5;
+ if (BNXT_VF(bp))
+ ent[i].db_offset = DB_VF_OFFSET_P5;
+ } else {
+ ent[i].db_offset = (idx + i) * 0x80;
+ }
}
}