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authorMika Westerberg <mika.westerberg@linux.intel.com>2018-09-27 16:41:46 -0500
committerBjorn Helgaas <bhelgaas@google.com>2018-10-02 16:04:40 -0500
commit720d6a671a6e2cf2b9ed032279b7c21c122bed7e (patch)
tree7298b10f96ac863b7a176c2201bdf9cefa20deaa
parenteb34da60edee8cf7bac691a406a1ddaa4175e5bc (diff)
downloadlinux-720d6a671a6e2cf2b9ed032279b7c21c122bed7e.tar.bz2
PCI: pciehp: Do not handle events if interrupts are masked
PCIe native hotplug shares MSI vector with native PME so the interrupt handler might get called even the hotplug interrupt is masked. In that case we should not handle any events because the interrupt was not meant for us. Modify the PCIe hotplug interrupt handler to check this accordingly and bail out if it finds out that the interrupt was not about hotplug. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lukas Wunner <lukas@wunner.de>
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 46598b4b0b92..7dd443aea5a5 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -518,9 +518,11 @@ static irqreturn_t pciehp_isr(int irq, void *dev_id)
u16 status, events;
/*
- * Interrupts only occur in D3hot or shallower (PCIe r4.0, sec 6.7.3.4).
+ * Interrupts only occur in D3hot or shallower and only if enabled
+ * in the Slot Control register (PCIe r4.0, sec 6.7.3.4).
*/
- if (pdev->current_state == PCI_D3cold)
+ if (pdev->current_state == PCI_D3cold ||
+ (!(ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE) && !pciehp_poll_mode))
return IRQ_NONE;
/*