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| author | Marc Zyngier <maz@kernel.org> | 2020-05-19 09:42:46 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-09-17 16:37:27 +0100 |
| commit | 3567c6ca47546106d36d995790e4eb80e3f14632 (patch) | |
| tree | 0ee6b81919f276cab8d820998d4dfcc8708c9bf9 | |
| parent | 64a267e9a41c5a91efdfa5bf55bd2509cb4f7170 (diff) | |
| download | linux-3567c6ca47546106d36d995790e4eb80e3f14632.tar.bz2 | |
irqchip/gic-common: Don't enable SGIs by default
The architecture code now enables the IPIs as required, so no
need to enable SGIs by default in the GIC code.
Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
| -rw-r--r-- | drivers/irqchip/irq-gic-common.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c index 82520006195d..f47b41dfd023 100644 --- a/drivers/irqchip/irq-gic-common.c +++ b/drivers/irqchip/irq-gic-common.c @@ -152,9 +152,6 @@ void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void)) writel_relaxed(GICD_INT_DEF_PRI_X4, base + GIC_DIST_PRI + i * 4 / 4); - /* Ensure all SGI interrupts are now enabled */ - writel_relaxed(GICD_INT_EN_SET_SGI, base + GIC_DIST_ENABLE_SET); - if (sync_access) sync_access(); } |