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authorFlorian Fainelli <f.fainelli@gmail.com>2015-06-26 10:39:04 -0700
committerDavid S. Miller <davem@davemloft.net>2015-06-28 20:28:20 -0700
commit8e346e1594bab6c06b6b4d2938c881729b03041d (patch)
tree87180c84eaafd9ee5dc56c021a3a3d72d0408f00
parent8031612d7fa8e49589a91da238a93a067826c668 (diff)
downloadlinux-8e346e1594bab6c06b6b4d2938c881729b03041d.tar.bz2
net: phy: bcm7xxx: workaround MDIO management controller initial read
The initial MDIO read or write towards the BCM7xxx integrated PHY may fail, workaround this by inserting a dummy MII_BMSR read to force the MDIO management controller to see at least one valid transaction and get out of stuck state out of reset. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/phy/bcm7xxx.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 4dea85bfc545..6b701b3ded74 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -246,6 +246,13 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
pr_info_once("%s: %s PHY revision: 0x%02x, patch: %d\n",
dev_name(&phydev->dev), phydev->drv->name, rev, patch);
+ /* Dummy read to a register to workaround an issue upon reset where the
+ * internal inverter may not allow the first MDIO transaction to pass
+ * the MDIO management controller and make us return 0xffff for such
+ * reads.
+ */
+ phy_read(phydev, MII_BMSR);
+
switch (rev) {
case 0xb0:
ret = bcm7xxx_28nm_b0_afe_config_init(phydev);