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author | Biao Huang <biao.huang@mediatek.com> | 2015-12-28 15:09:03 +0800 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2016-01-07 11:10:59 +0100 |
commit | 14da0a91bf4ac2a90d64446ddaa39a4869530f8c (patch) | |
tree | 7caf3c88b1f983b0323a8aa8bcb5736f7ce2d565 | |
parent | 4afaee3c2b7fb49d3ec1bcd89c7b960b5ae646b3 (diff) | |
download | linux-14da0a91bf4ac2a90d64446ddaa39a4869530f8c.tar.bz2 |
pinctrl: mediatek: Modify pinctrl bindings for mt2701
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Mathias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt index 0480bc31bfd7..9ffb0b276bb4 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt @@ -4,10 +4,11 @@ The Mediatek's Pin controller is used to control SoC pins. Required properties: - compatible: value should be one of the following. - (a) "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl. - (b) "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl. - (c) "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl. - (d) "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl. + "mediatek,mt2701-pinctrl", compatible with mt2701 pinctrl. + "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl. + "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl. + "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl. + "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl. - pins-are-numbered: Specify the subnodes are using numbered pinmux to specify pins. - gpio-controller : Marks the device node as a gpio controller. |