diff options
| author | Tomasz Figa <tomasz.figa@gmail.com> | 2013-07-23 01:49:18 +0200 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2013-08-05 11:56:46 -0700 |
| commit | c57acd14ac2d53e40f5c17701c3cc3a092a07b35 (patch) | |
| tree | f26fc4f7c7449f3ccfb2e36090561adbf0504bd2 | |
| parent | 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b (diff) | |
| download | linux-c57acd14ac2d53e40f5c17701c3cc3a092a07b35.tar.bz2 | |
clk: mux: Add support for read-only muxes.
Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read-only muxes by adding new
CLK_MUX_READ_ONLY mux flag.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
| -rw-r--r-- | drivers/clk/clk-mux.c | 10 | ||||
| -rw-r--r-- | include/linux/clk-provider.h | 2 |
2 files changed, 11 insertions, 1 deletions
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 614444ca40cd..92f1a1be5319 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -107,6 +107,11 @@ const struct clk_ops clk_mux_ops = { }; EXPORT_SYMBOL_GPL(clk_mux_ops); +const struct clk_ops clk_mux_ro_ops = { + .get_parent = clk_mux_get_parent, +}; +EXPORT_SYMBOL_GPL(clk_mux_ro_ops); + struct clk *clk_register_mux_table(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, @@ -133,7 +138,10 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name, } init.name = name; - init.ops = &clk_mux_ops; + if (clk_mux_flags & CLK_MUX_READ_ONLY) + init.ops = &clk_mux_ro_ops; + else + init.ops = &clk_mux_ops; init.flags = flags | CLK_IS_BASIC; init.parent_names = parent_names; init.num_parents = num_parents; diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 1ec14a732176..9487b96939e8 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -327,8 +327,10 @@ struct clk_mux { #define CLK_MUX_INDEX_ONE BIT(0) #define CLK_MUX_INDEX_BIT BIT(1) #define CLK_MUX_HIWORD_MASK BIT(2) +#define CLK_MUX_READ_ONLY BIT(3) /* mux setting cannot be changed */ extern const struct clk_ops clk_mux_ops; +extern const struct clk_ops clk_mux_ro_ops; struct clk *clk_register_mux(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, |