diff options
| author | Finley Xiao <finley.xiao@rock-chips.com> | 2016-09-01 20:16:56 -0700 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-09-02 17:19:42 +0200 |
| commit | b7ee3b2742f34d9b8404f35ad008361a2d234990 (patch) | |
| tree | 55b702d0cb65dc0485265e8dc391647a9bd1ade0 | |
| parent | 9eb4f3c45027d086a4953e78db6566c36953b9f7 (diff) | |
| download | linux-b7ee3b2742f34d9b8404f35ad008361a2d234990.tar.bz2 | |
arm64: dts: rockchip: add efuse0 device node for rk3399
Add a efuse0 node in the device tree for the ARM64 rk3399 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 9d9a0986f862..267b812961e7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -964,6 +964,35 @@ status = "disabled"; }; + efuse0: efuse@ff690000 { + compatible = "rockchip,rk3399-efuse"; + reg = <0x0 0xff690000 0x0 0x80>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru PCLK_EFUSE1024NS>; + clock-names = "pclk_efuse"; + + /* Data cells */ + cpub_leakage: cpu-leakage@17 { + reg = <0x17 0x1>; + }; + gpu_leakage: gpu-leakage@18 { + reg = <0x18 0x1>; + }; + center_leakage: center-leakage@19 { + reg = <0x19 0x1>; + }; + cpul_leakage: cpu-leakage@1a { + reg = <0x1a 0x1>; + }; + logic_leakage: logic-leakage@1b { + reg = <0x1b 0x1>; + }; + wafer_info: wafer-info@1c { + reg = <0x1c 0x1>; + }; + }; + pmucru: pmu-clock-controller@ff750000 { compatible = "rockchip,rk3399-pmucru"; reg = <0x0 0xff750000 0x0 0x1000>; |