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author | Paolo Bonzini <pbonzini@redhat.com> | 2014-03-18 10:47:17 +0100 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2014-03-21 10:20:10 +0100 |
commit | 0bc830b05c667218d703f2026ec866c49df974fc (patch) | |
tree | 7360f66e70717eb144a16444c30e49eade21cdea | |
parent | 0b10a1c87a2b0fb459baaefba9cb163dbb8d3344 (diff) | |
download | linux-0bc830b05c667218d703f2026ec866c49df974fc.tar.bz2 |
KVM: ioapic: clear IRR for edge-triggered interrupts at delivery
This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if
the interrupt is still sitting in the IOAPIC. After the next patches, it
avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is
called.
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r-- | virt/kvm/ioapic.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c index 0b4914147b9d..25e16a6898ed 100644 --- a/virt/kvm/ioapic.c +++ b/virt/kvm/ioapic.c @@ -288,6 +288,9 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status) irqe.level = 1; irqe.shorthand = 0; + if (irqe.trig_mode == IOAPIC_EDGE_TRIG) + ioapic->irr &= ~(1 << irq); + if (irq == RTC_GSI && line_status) { BUG_ON(ioapic->rtc_status.pending_eoi != 0); ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, |