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| author | Magnus Damm <magnus.damm@gmail.com> | 2008-04-23 21:25:29 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-05-08 19:51:57 +0900 |
| commit | 346b746300f470bb4a72b66275d6a43987c5dfa6 (patch) | |
| tree | 3827c877091f8fef576886a96a3fa30dfd368c09 | |
| parent | 191d4437b9c028afee1a0568d9c7e6e0b264c703 (diff) | |
| download | linux-346b746300f470bb4a72b66275d6a43987c5dfa6.tar.bz2 | |
sh-sci: improve sh7722 support
Improve sh7722 support for SCIF1 and SCIF2 and separate code
from sh7366 implementation.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| -rw-r--r-- | drivers/serial/sh-sci.c | 22 | ||||
| -rw-r--r-- | drivers/serial/sh-sci.h | 21 |
2 files changed, 27 insertions, 16 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 0a051bca01c7..8fdafc27fce8 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -363,21 +363,19 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) { unsigned int fcr_val = 0; + unsigned short data; - if (cflag & CRTSCTS) { - fcr_val |= SCFCR_MCE; - - ctrl_outw(0x0000, PORT_PSCR); - } else { - unsigned short data; - - data = ctrl_inw(PORT_PSCR); - data &= 0x033f; - data |= 0x0400; - ctrl_outw(data, PORT_PSCR); + if (port->mapbase == 0xffe00000) { + data = ctrl_inw(PSCR); + data &= ~0x03cf; + if (cflag & CRTSCTS) + fcr_val |= SCFCR_MCE; + else + data |= 0x0340; - ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); + ctrl_outw(data, PSCR); } + /* SCIF1 and SCIF2 should be setup by board code */ sci_out(port, SCFCR, fcr_val); } diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index fa8700a968fc..4d1c0e328a03 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -76,12 +76,13 @@ # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH7722) -# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ -# define SCSPTR0 SCPDR0 +# define PADR 0xA4050120 +# define PSDR 0xA405013e +# define PWDR 0xA4050166 +# define PSCR 0xA405011E # define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY -# define PORT_PSCR 0xA405011E #elif defined(CONFIG_CPU_SUBTYPE_SH7366) # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ # define SCSPTR0 SCPDR0 @@ -593,13 +594,25 @@ static inline int sci_rxd_in(struct uart_port *port) return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ return 1; } -#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366) +#elif defined(CONFIG_CPU_SUBTYPE_SH7366) static inline int sci_rxd_in(struct uart_port *port) { if (port->mapbase == 0xffe00000) return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ return 1; } +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xffe00000) + return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */ + if (port->mapbase == 0xffe10000) + return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */ + if (port->mapbase == 0xffe20000) + return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */ + + return 1; +} #elif defined(CONFIG_CPU_SUBTYPE_SH7723) static inline int sci_rxd_in(struct uart_port *port) { |