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authorDavid S. Miller <davem@davemloft.net>2008-07-17 23:43:55 -0700
committerDavid S. Miller <davem@davemloft.net>2008-07-17 23:44:53 -0700
commitf7fe93344fd3f4ccd406a35f751a61b77f94b0fc (patch)
tree2d164e040f6acde923147a53e5c92fa0ca0cf0ec
parentd172ad18f9914f70c761a6cad470efc986d5e07e (diff)
downloadlinux-f7fe93344fd3f4ccd406a35f751a61b77f94b0fc.tar.bz2
sparc64: Remove 4MB and 512K base page size options.
Adrian Bunk reported that enabling 4MB page size breaks the build. The problem is that MAX_ORDER combined with the page shift exceeds the SECTION_SIZE_BITS we use in asm-sparc64/sparsemem.h There are several ways I suppose we could work around this. For one we could define a CONFIG_FORCE_MAX_ZONEORDER to decrease MAX_ORDER in these higher page size cases. But I also know that these page size cases are broken wrt. TLB miss handling especially on pre-hypervisor systems, and there isn't an easy way to fix that. These options were meant to be fun experimental hacks anyways, and only 8K and 64K make any sense to support. So remove 512K and 4M base page size support. Of course, we still support these page sizes for huge pages. Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--arch/sparc64/Kconfig11
-rw-r--r--arch/sparc64/lib/copy_page.S6
-rw-r--r--arch/sparc64/mm/tsb.c6
-rw-r--r--include/asm-sparc/mmu_64.h4
-rw-r--r--include/asm-sparc/page_64.h4
-rw-r--r--include/asm-sparc/pgtable_64.h6
6 files changed, 4 insertions, 33 deletions
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index 1aeb1da9829d..7c88263256af 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -98,19 +98,11 @@ config SPARC64_PAGE_SIZE_8KB
8KB and 64KB work quite well, since SPARC ELF sections
provide for up to 64KB alignment.
- Therefore, 512KB and 4MB are for expert hackers only.
-
If you don't know what to do, choose 8KB.
config SPARC64_PAGE_SIZE_64KB
bool "64KB"
-config SPARC64_PAGE_SIZE_512KB
- bool "512KB"
-
-config SPARC64_PAGE_SIZE_4MB
- bool "4MB"
-
endchoice
config SECCOMP
@@ -226,11 +218,10 @@ config HUGETLB_PAGE_SIZE_4MB
bool "4MB"
config HUGETLB_PAGE_SIZE_512K
- depends on !SPARC64_PAGE_SIZE_4MB && !SPARC64_PAGE_SIZE_512KB
bool "512K"
config HUGETLB_PAGE_SIZE_64K
- depends on !SPARC64_PAGE_SIZE_4MB && !SPARC64_PAGE_SIZE_512KB && !SPARC64_PAGE_SIZE_64KB
+ depends on !SPARC64_PAGE_SIZE_64KB
bool "64K"
endchoice
diff --git a/arch/sparc64/lib/copy_page.S b/arch/sparc64/lib/copy_page.S
index 37460666a5c3..b243d3b606ba 100644
--- a/arch/sparc64/lib/copy_page.S
+++ b/arch/sparc64/lib/copy_page.S
@@ -25,9 +25,9 @@
#define DCACHE_SIZE (PAGE_SIZE * 2)
-#if (PAGE_SHIFT == 13) || (PAGE_SHIFT == 19)
+#if (PAGE_SHIFT == 13)
#define PAGE_SIZE_REM 0x80
-#elif (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22)
+#elif (PAGE_SHIFT == 16)
#define PAGE_SIZE_REM 0x100
#else
#error Wrong PAGE_SHIFT specified
@@ -198,7 +198,7 @@ cheetah_copy_page_insn:
cmp %o2, PAGE_SIZE_REM
bne,pt %xcc, 1b
add %o0, 0x40, %o0
-#if (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22)
+#if (PAGE_SHIFT == 16)
TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
ldda [%o1] ASI_BLK_P, %f32
stda %f48, [%o0] %asi
diff --git a/arch/sparc64/mm/tsb.c b/arch/sparc64/mm/tsb.c
index fe70c8a557b5..3547937b17a2 100644
--- a/arch/sparc64/mm/tsb.c
+++ b/arch/sparc64/mm/tsb.c
@@ -96,12 +96,6 @@ void flush_tsb_user(struct mmu_gather *mp)
#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_64K
#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_64K
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB)
-#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_512K
-#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_512K
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB)
-#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_4MB
-#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_4MB
#else
#error Broken base page size setting...
#endif
diff --git a/include/asm-sparc/mmu_64.h b/include/asm-sparc/mmu_64.h
index 8abc58f0f9d7..9067dc500535 100644
--- a/include/asm-sparc/mmu_64.h
+++ b/include/asm-sparc/mmu_64.h
@@ -34,10 +34,6 @@
#define CTX_PGSZ_BASE CTX_PGSZ_8KB
#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
#define CTX_PGSZ_BASE CTX_PGSZ_64KB
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB)
-#define CTX_PGSZ_BASE CTX_PGSZ_512KB
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB)
-#define CTX_PGSZ_BASE CTX_PGSZ_4MB
#else
#error No page size specified in kernel configuration
#endif
diff --git a/include/asm-sparc/page_64.h b/include/asm-sparc/page_64.h
index 93f0881b766e..a8a2bba032c1 100644
--- a/include/asm-sparc/page_64.h
+++ b/include/asm-sparc/page_64.h
@@ -7,10 +7,6 @@
#define PAGE_SHIFT 13
#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
#define PAGE_SHIFT 16
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB)
-#define PAGE_SHIFT 19
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB)
-#define PAGE_SHIFT 22
#else
#error No page size specified in kernel configuration
#endif
diff --git a/include/asm-sparc/pgtable_64.h b/include/asm-sparc/pgtable_64.h
index 78d5594964a3..bb9ec2cce355 100644
--- a/include/asm-sparc/pgtable_64.h
+++ b/include/asm-sparc/pgtable_64.h
@@ -161,12 +161,6 @@
#elif PAGE_SHIFT == 16
#define _PAGE_SZBITS_4U _PAGE_SZ64K_4U
#define _PAGE_SZBITS_4V _PAGE_SZ64K_4V
-#elif PAGE_SHIFT == 19
-#define _PAGE_SZBITS_4U _PAGE_SZ512K_4U
-#define _PAGE_SZBITS_4V _PAGE_SZ512K_4V
-#elif PAGE_SHIFT == 22
-#define _PAGE_SZBITS_4U _PAGE_SZ4MB_4U
-#define _PAGE_SZBITS_4V _PAGE_SZ4MB_4V
#else
#error Wrong PAGE_SHIFT specified
#endif