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authorLinus Torvalds <torvalds@linux-foundation.org>2014-02-11 12:24:35 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2014-02-11 12:24:35 -0800
commit738b52bb9845da183b6ff46a8f685b56a63379d1 (patch)
tree6e812400614efd2a3e03bf5412cf23eaeb166828
parenta87af778d847dc085c06c98b7e6d1ca441f7f087 (diff)
parenta49f56eec54d864ba0fda838e4c8bf5c72f3eb08 (diff)
downloadlinux-738b52bb9845da183b6ff46a8f685b56a63379d1.tar.bz2
Merge tag 'microblaze-3.14-rc3' of git://git.monstr.eu/linux-2.6-microblaze
Pull microblaze fixes from Michal Simek: - Fix two compilation issues - HZ, readq/writeq - Fix stack protection support * tag 'microblaze-3.14-rc3' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Fix a typo when disabling stack protection microblaze: Define readq and writeq IO helper function microblaze: Fix missing HZ macro
-rw-r--r--arch/microblaze/include/asm/delay.h2
-rw-r--r--arch/microblaze/include/asm/io.h6
-rw-r--r--arch/microblaze/kernel/head.S2
3 files changed, 9 insertions, 1 deletions
diff --git a/arch/microblaze/include/asm/delay.h b/arch/microblaze/include/asm/delay.h
index 05b7d39e4391..66fc24c24238 100644
--- a/arch/microblaze/include/asm/delay.h
+++ b/arch/microblaze/include/asm/delay.h
@@ -13,6 +13,8 @@
#ifndef _ASM_MICROBLAZE_DELAY_H
#define _ASM_MICROBLAZE_DELAY_H
+#include <linux/param.h>
+
extern inline void __delay(unsigned long loops)
{
asm volatile ("# __delay \n\t" \
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index a2cea7206077..3fbb7f1db3bc 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -89,6 +89,11 @@ static inline unsigned int readl(const volatile void __iomem *addr)
{
return le32_to_cpu(*(volatile unsigned int __force *)addr);
}
+#define readq readq
+static inline u64 readq(const volatile void __iomem *addr)
+{
+ return le64_to_cpu(__raw_readq(addr));
+}
static inline void writeb(unsigned char v, volatile void __iomem *addr)
{
*(volatile unsigned char __force *)addr = v;
@@ -101,6 +106,7 @@ static inline void writel(unsigned int v, volatile void __iomem *addr)
{
*(volatile unsigned int __force *)addr = cpu_to_le32(v);
}
+#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
/* ioread and iowrite variants. thease are for now same as __raw_
* variants of accessors. we might check for endianess in the feature
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index b7fb0438458c..17645b2e2f07 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -66,7 +66,7 @@ real_start:
mts rmsr, r0
/* Disable stack protection from bootloader */
mts rslr, r0
- addi r8, r0, 0xFFFFFFF
+ addi r8, r0, 0xFFFFFFFF
mts rshr, r8
/*
* According to Xilinx, msrclr instruction behaves like 'mfs rX,rpc'