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author | Alex Deucher <alexander.deucher@amd.com> | 2013-10-02 13:01:36 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2014-01-08 18:42:22 -0500 |
commit | 1a0041b8f99656a4600b587a491a1caa0e979e18 (patch) | |
tree | 9769fdbb34acc9c32c554702b833258d02b52645 | |
parent | 363eb0b4b787ea6ebb7a58d15df032126c111770 (diff) | |
download | linux-1a0041b8f99656a4600b587a491a1caa0e979e18.tar.bz2 |
drm/radeon: add pci config hard reset
This is used to hard reset the asic. If a soft
reset is not able to reset things, a hard reset
can be used.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 5 |
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 9dd6cc49b877..746c0c6c269b 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -140,6 +140,9 @@ extern int radeon_hard_reset; #define RADEON_VA_RESERVED_SIZE (8 << 20) #define RADEON_IB_VM_MAX_SIZE (64 << 10) +/* hard reset data */ +#define RADEON_ASIC_RESET_DATA 0x39d5e86b + /* reset flags */ #define RADEON_RESET_GFX (1 << 0) #define RADEON_RESET_COMPUTE (1 << 1) @@ -2675,6 +2678,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); /* Common functions */ /* AGP */ extern int radeon_gpu_reset(struct radeon_device *rdev); +extern void radeon_pci_config_reset(struct radeon_device *rdev); extern void r600_set_bios_scratch_engine_hung(struct radeon_device *rdev, bool hung); extern void radeon_agp_disable(struct radeon_device *rdev); extern int radeon_modeset_init(struct radeon_device *rdev); diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 4d20e78b9b70..b012cbbc3ed5 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -144,6 +144,11 @@ void radeon_program_register_sequence(struct radeon_device *rdev, } } +void radeon_pci_config_reset(struct radeon_device *rdev) +{ + pci_write_config_dword(rdev->pdev, 0x7c, RADEON_ASIC_RESET_DATA); +} + /** * radeon_surface_init - Clear GPU surface registers. * |