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| author | Markos Chandras <markos.chandras@imgtec.com> | 2014-01-09 16:01:29 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:18 +0100 |
| commit | 7ae669665698b72d81e2080ebb220dfad49248dc (patch) | |
| tree | 965a83cf1cbfd50ee06e23d29be5c4706430f0d0 | |
| parent | 27b3db2031d3c293fd19ff99a6bd0752384db56f (diff) | |
| download | linux-7ae669665698b72d81e2080ebb220dfad49248dc.tar.bz2 | |
MIPS: asm: cpu: Add cpu flag for Enhanced Virtual Addressing
The MIPS *Aptiv family uses bit 28 in Config5 CP0 register to
indicate whether the core supports EVA or not.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
| -rw-r--r-- | arch/mips/include/asm/cpu-features.h | 4 | ||||
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 1 |
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 390795dfa2e9..f56cc975b92f 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -26,7 +26,9 @@ #ifndef cpu_has_segments #define cpu_has_segments (cpu_data[0].options & MIPS_CPU_SEGMENTS) #endif - +#ifndef cpu_has_eva +#define cpu_has_eva (cpu_data[0].options & MIPS_CPU_EVA) +#endif /* * For the moment we don't consider R6000 and R8000 so we can assume that diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 93c2a0e4424e..c12d99780204 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -359,6 +359,7 @@ enum cpu_type_enum { #define MIPS_CPU_MICROMIPS 0x01000000 /* CPU has microMIPS capability */ #define MIPS_CPU_TLBINV 0x02000000 /* CPU supports TLBINV/F */ #define MIPS_CPU_SEGMENTS 0x04000000 /* CPU supports Segmentation Control registers */ +#define MIPS_CPU_EVA 0x80000000 /* CPU supports Enhanced Virtual Addressing */ /* * CPU ASE encodings |