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authorStephen Boyd <sboyd@kernel.org>2022-12-12 11:12:26 -0800
committerStephen Boyd <sboyd@kernel.org>2022-12-12 11:12:26 -0800
commita9fc882f57625761252169c62b19e99578531a9e (patch)
treede7825a1d4ace2670a8685e8f9909ed51dda6dfa /drivers/clk
parent830b3c68c1fb1e9176028d02ef86f3cf76aa2476 (diff)
parent7256d1f4618b40792d1e9b9b6cb1406a13cad2dd (diff)
parent2875a2f3f18359517e1720cf252ee5e7c2d6c29d (diff)
parent5e57aaa8b6ec038940c2258b803c53f08a65d1f0 (diff)
parentfadbafc1b7b7a36d479a8e34adc85e8f7c614a3e (diff)
parentff0d3ae04f7307ff2447ad79f38806f240fe783d (diff)
downloadlinux-a9fc882f57625761252169c62b19e99578531a9e.tar.bz2
Merge branches 'clk-x86', 'clk-xilinx', 'clk-cleanup', 'clk-mstar' and 'clk-ingenic' into clk-next
- Make MxL's CGU driver secure compatible - Support for CPU PLL on MStar/SigmaStar SoCs - Ingenic JZ4755 SoC clk support - Support audio clks on X1000 SoCs * clk-x86: clk: mxl: syscon_node_to_regmap() returns error pointers clk: mxl: Fix a clk entry by adding relevant flags clk: mxl: Add option to override gate clks clk: mxl: Remove redundant spinlocks clk: mxl: Switch from direct readl/writel based IO to regmap based IO * clk-xilinx: clk: xilinx: Drop duplicate depends on COMMON_CLK * clk-cleanup: clk: nomadik: correct struct name kernel-doc warning clk: lmk04832: fix kernel-doc warnings clk: lmk04832: drop superfluous #include clk: lmk04832: drop unnecessary semicolons clk: lmk04832: declare variables as const when possible clk: socfpga: Fix memory leak in socfpga_gate_init() clk: st: Fix memory leak in st_of_quadfs_setup() clk: samsung: Fix memory leak in _samsung_clk_register_pll() clk: visconti: Fix memory leak in visconti_register_pll() clk: Remove a useless include clk: samsung: Fix reference to CLK_OF_DECLARE in comment clk: stm32mp1: Staticize ethrx_src clk: keystone: syscon-clk: Use dev_err_probe() helper clk: bulk: Use dev_err_probe() helper in __clk_bulk_get() clk: cdce925: simplify using devm_regulator_get_enable() * clk-mstar: clk: mstar: msc313 cpupll clk driver * clk-ingenic: clk: Add Ingenic JZ4755 CGU driver dt-bindings: clock: Add Ingenic JZ4755 CGU header dt-bindings: ingenic: Add support for the JZ4755 CGU clk: ingenic: Minor cosmetic fixups for X1000 clk: ingenic: Add X1000 audio clocks dt-bindings: ingenic,x1000-cgu: Add audio clocks clk: ingenic: Add .set_rate_hook() for PLL clocks clk: ingenic: Make PLL clock enable_bit and stable_bit optional clk: ingenic: Make PLL clock "od" field optional