/* SPDX-License-Identifier: GPL-2.0 * * Copyright 2016-2018 HabanaLabs, Ltd. * All Rights Reserved. * */ /************************************ ** This is an auto-generated file ** ** DO NOT EDIT BELOW ** ************************************/ #ifndef ASIC_REG_SIF_RTR_CTRL_5_REGS_H_ #define ASIC_REG_SIF_RTR_CTRL_5_REGS_H_ /* ***************************************** * SIF_RTR_CTRL_5 (Prototype: RTR_CTRL) ***************************************** */ #define mmSIF_RTR_CTRL_5_PERM_SEL 0x356108 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_0 0x356114 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_1 0x356118 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_2 0x35611C #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_3 0x356120 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_4 0x356124 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_5 0x356128 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_6 0x35612C #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_7 0x356130 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_8 0x356134 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_9 0x356138 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_10 0x35613C #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_11 0x356140 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_12 0x356144 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_13 0x356148 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_14 0x35614C #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_15 0x356150 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_16 0x356154 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_17 0x356158 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_18 0x35615C #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_19 0x356160 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_20 0x356164 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_21 0x356168 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_22 0x35616C #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_23 0x356170 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_24 0x356174 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_25 0x356178 #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_26 0x35617C #define mmSIF_RTR_CTRL_5_HBM_POLY_H3_27 0x356180 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_0 0x356184 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_1 0x356188 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_2 0x35618C #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_3 0x356190 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_4 0x356194 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_5 0x356198 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_6 0x35619C #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_7 0x3561A0 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_8 0x3561A4 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_9 0x3561A8 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_10 0x3561AC #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_11 0x3561B0 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_12 0x3561B4 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_13 0x3561B8 #define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_14 0x3561BC #define mmSIF_RTR_CTRL_5_SCRAM_SRAM_EN 0x35626C #define mmSIF_RTR_CTRL_5_RL_HBM_EN 0x356274 #define mmSIF_RTR_CTRL_5_RL_HBM_SAT 0x356278 #define mmSIF_RTR_CTRL_5_RL_HBM_RST 0x35627C #define mmSIF_RTR_CTRL_5_RL_HBM_TIMEOUT 0x356280 #define mmSIF_RTR_CTRL_5_SCRAM_HBM_EN 0x356284 #define mmSIF_RTR_CTRL_5_RL_PCI_EN 0x356288 #define mmSIF_RTR_CTRL_5_RL_PCI_SAT 0x35628C #define mmSIF_RTR_CTRL_5_RL_PCI_RST 0x356290 #define mmSIF_RTR_CTRL_5_RL_PCI_TIMEOUT 0x356294 #define mmSIF_RTR_CTRL_5_RL_SRAM_EN 0x35629C #define mmSIF_RTR_CTRL_5_RL_SRAM_SAT 0x3562A0 #define mmSIF_RTR_CTRL_5_RL_SRAM_RST 0x3562A4 #define mmSIF_RTR_CTRL_5_RL_SRAM_TIMEOUT 0x3562AC #define mmSIF_RTR_CTRL_5_RL_SRAM_RED 0x3562B4 #define mmSIF_RTR_CTRL_5_E2E_HBM_EN 0x3562EC #define mmSIF_RTR_CTRL_5_E2E_PCI_EN 0x3562F0 #define mmSIF_RTR_CTRL_5_E2E_HBM_WR_SIZE 0x3562F4 #define mmSIF_RTR_CTRL_5_E2E_PCI_WR_SIZE 0x3562F8 #define mmSIF_RTR_CTRL_5_E2E_AW_PCI_CTR_SET_EN 0x356404 #define mmSIF_RTR_CTRL_5_E2E_AW_PCI_CTR_SET 0x356408 #define mmSIF_RTR_CTRL_5_E2E_AW_PCI_CTR_WRAP 0x35640C #define mmSIF_RTR_CTRL_5_E2E_AW_PCI_CTR_CNT 0x356410 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM_CTR_SET_EN 0x356414 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM_CTR_SET 0x356418 #define mmSIF_RTR_CTRL_5_E2E_HBM_RD_SIZE 0x35641C #define mmSIF_RTR_CTRL_5_E2E_PCI_RD_SIZE 0x356420 #define mmSIF_RTR_CTRL_5_E2E_AR_PCI_CTR_SET_EN 0x356424 #define mmSIF_RTR_CTRL_5_E2E_AR_PCI_CTR_SET 0x356428 #define mmSIF_RTR_CTRL_5_E2E_AR_PCI_CTR_WRAP 0x35642C #define mmSIF_RTR_CTRL_5_E2E_AR_PCI_CTR_CNT 0x356430 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM_CTR_SET_EN 0x356434 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM_CTR_SET 0x356438 #define mmSIF_RTR_CTRL_5_NL_HBM_SEL_0 0x356450 #define mmSIF_RTR_CTRL_5_NL_HBM_SEL_1 0x356454 #define mmSIF_RTR_CTRL_5_NON_LIN_EN 0x356480 #define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_0 0x356500 #define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_1 0x356504 #define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_2 0x356508 #define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_3 0x35650C #define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_4 0x356510 #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_0 0x356514 #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_1 0x356520 #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_2 0x356524 #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_3 0x356528 #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_4 0x35652C #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_5 0x356530 #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_6 0x356534 #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_7 0x356538 #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_8 0x35653C #define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_9 0x356540 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_0 0x356550 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_1 0x356554 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_2 0x356558 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_3 0x35655C #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_4 0x356560 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_5 0x356564 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_6 0x356568 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_7 0x35656C #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_8 0x356570 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_9 0x356574 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_10 0x356578 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_11 0x35657C #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_12 0x356580 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_13 0x356584 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_14 0x356588 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_15 0x35658C #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_16 0x356590 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_17 0x356594 #define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_18 0x356598 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_0 0x3565E4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_1 0x3565E8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_2 0x3565EC #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_3 0x3565F0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_4 0x3565F4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_5 0x3565F8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_6 0x3565FC #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_7 0x356600 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_8 0x356604 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_9 0x356608 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_10 0x35660C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_11 0x356610 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_12 0x356614 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_13 0x356618 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_14 0x35661C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_15 0x356620 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_0 0x356624 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_1 0x356628 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_2 0x35662C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_3 0x356630 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_4 0x356634 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_5 0x356638 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_6 0x35663C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_7 0x356640 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_8 0x356644 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_9 0x356648 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_10 0x35664C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_11 0x356650 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_12 0x356654 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_13 0x356658 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_14 0x35665C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_15 0x356660 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_0 0x356664 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_1 0x356668 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_2 0x35666C #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_3 0x356670 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_4 0x356674 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_5 0x356678 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_6 0x35667C #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_7 0x356680 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_8 0x356684 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_9 0x356688 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_10 0x35668C #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_11 0x356690 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_12 0x356694 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_13 0x356698 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_14 0x35669C #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_15 0x3566A0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_0 0x3566A4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_1 0x3566A8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_2 0x3566AC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_3 0x3566B0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_4 0x3566B4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_5 0x3566B8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_6 0x3566BC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_7 0x3566C0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_8 0x3566C4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_9 0x3566C8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_10 0x3566CC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_11 0x3566D0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_12 0x3566D4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_13 0x3566D8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_14 0x3566DC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_15 0x3566E0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_0 0x3566E4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_1 0x3566E8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_2 0x3566EC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_3 0x3566F0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_4 0x3566F4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_5 0x3566F8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_6 0x3566FC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_7 0x356700 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_8 0x356704 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_9 0x356708 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_10 0x35670C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_11 0x356710 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_12 0x356714 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_13 0x356718 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_14 0x35671C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_15 0x356720 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_0 0x356724 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_1 0x356728 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_2 0x35672C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_3 0x356730 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_4 0x356734 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_5 0x356738 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_6 0x35673C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_7 0x356740 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_8 0x356744 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_9 0x356748 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_10 0x35674C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_11 0x356750 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_12 0x356754 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_13 0x356758 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_14 0x35675C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_15 0x356760 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_0 0x356764 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_1 0x356768 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_2 0x35676C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_3 0x356770 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_4 0x356774 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_5 0x356778 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_6 0x35677C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_7 0x356780 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_8 0x356784 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_9 0x356788 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_10 0x35678C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_11 0x356790 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_12 0x356794 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_13 0x356798 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_14 0x35679C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_15 0x3567A0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_0 0x3567A4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_1 0x3567A8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_2 0x3567AC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_3 0x3567B0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_4 0x3567B4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_5 0x3567B8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_6 0x3567BC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_7 0x3567C0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_8 0x3567C4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_9 0x3567C8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_10 0x3567CC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_11 0x3567D0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_12 0x3567D4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_13 0x3567D8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_14 0x3567DC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_15 0x3567E0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_0 0x356824 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_1 0x356828 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_2 0x35682C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_3 0x356830 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_4 0x356834 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_5 0x356838 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_6 0x35683C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_7 0x356840 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_8 0x356844 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_9 0x356848 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_10 0x35684C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_11 0x356850 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_12 0x356854 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_13 0x356858 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_14 0x35685C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_15 0x356860 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_0 0x356864 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_1 0x356868 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_2 0x35686C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_3 0x356870 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_4 0x356874 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_5 0x356878 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_6 0x35687C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_7 0x356880 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_8 0x356884 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_9 0x356888 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_10 0x35688C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_11 0x356890 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_12 0x356894 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_13 0x356898 #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_14 0x35689C #define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_15 0x3568A0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_0 0x3568A4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_1 0x3568A8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_2 0x3568AC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_3 0x3568B0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_4 0x3568B4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_5 0x3568B8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_6 0x3568BC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_7 0x3568C0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_8 0x3568C4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_9 0x3568C8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_10 0x3568CC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_11 0x3568D0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_12 0x3568D4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_13 0x3568D8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_14 0x3568DC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_15 0x3568E0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_0 0x3568E4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_1 0x3568E8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_2 0x3568EC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_3 0x3568F0 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_4 0x3568F4 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_5 0x3568F8 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_6 0x3568FC #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_7 0x356900 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_8 0x356904 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_9 0x356908 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_10 0x35690C #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_11 0x356910 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_12 0x356914 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_13 0x356918 #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_14 0x35691C #define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_15 0x356920 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_0 0x356924 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_1 0x356928 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_2 0x35692C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_3 0x356930 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_4 0x356934 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_5 0x356938 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_6 0x35693C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_7 0x356940 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_8 0x356944 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_9 0x356948 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_10 0x35694C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_11 0x356950 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_12 0x356954 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_13 0x356958 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_14 0x35695C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_15 0x356960 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_0 0x356964 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_1 0x356968 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_2 0x35696C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_3 0x356970 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_4 0x356974 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_5 0x356978 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_6 0x35697C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_7 0x356980 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_8 0x356984 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_9 0x356988 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_10 0x35698C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_11 0x356990 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_12 0x356994 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_13 0x356998 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_14 0x35699C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_15 0x3569A0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_0 0x3569A4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_1 0x3569A8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_2 0x3569AC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_3 0x3569B0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_4 0x3569B4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_5 0x3569B8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_6 0x3569BC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_7 0x3569C0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_8 0x3569C4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_9 0x3569C8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_10 0x3569CC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_11 0x3569D0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_12 0x3569D4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_13 0x3569D8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_14 0x3569DC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_15 0x3569E0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_0 0x3569E4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_1 0x3569E8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_2 0x3569EC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_3 0x3569F0 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_4 0x3569F4 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_5 0x3569F8 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_6 0x3569FC #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_7 0x356A00 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_8 0x356A04 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_9 0x356A08 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_10 0x356A0C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_11 0x356A10 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_12 0x356A14 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_13 0x356A18 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_14 0x356A1C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_15 0x356A20 #define mmSIF_RTR_CTRL_5_RANGE_SEC_HIT_AW 0x356A64 #define mmSIF_RTR_CTRL_5_RANGE_SEC_HIT_AR 0x356A68 #define mmSIF_RTR_CTRL_5_RANGE_PRIV_HIT_AW 0x356A6C #define mmSIF_RTR_CTRL_5_RANGE_PRIV_HIT_AR 0x356A70 #define mmSIF_RTR_CTRL_5_RGL_CFG 0x356B64 #define mmSIF_RTR_CTRL_5_RGL_SHIFT 0x356B68 #define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_0 0x356B6C #define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_1 0x356B70 #define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_2 0x356B74 #define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_3 0x356B78 #define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_4 0x356B7C #define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_5 0x356B80 #define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_6 0x356B84 #define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_7 0x356B88 #define mmSIF_RTR_CTRL_5_RGL_TOKEN_0 0x356BAC #define mmSIF_RTR_CTRL_5_RGL_TOKEN_1 0x356BB0 #define mmSIF_RTR_CTRL_5_RGL_TOKEN_2 0x356BB4 #define mmSIF_RTR_CTRL_5_RGL_TOKEN_3 0x356BB8 #define mmSIF_RTR_CTRL_5_RGL_TOKEN_4 0x356BBC #define mmSIF_RTR_CTRL_5_RGL_TOKEN_5 0x356BC0 #define mmSIF_RTR_CTRL_5_RGL_TOKEN_6 0x356BC4 #define mmSIF_RTR_CTRL_5_RGL_TOKEN_7 0x356BC8 #define mmSIF_RTR_CTRL_5_RGL_BANK_ID_0 0x356BEC #define mmSIF_RTR_CTRL_5_RGL_BANK_ID_1 0x356BF0 #define mmSIF_RTR_CTRL_5_RGL_BANK_ID_2 0x356BF4 #define mmSIF_RTR_CTRL_5_RGL_BANK_ID_3 0x356BF8 #define mmSIF_RTR_CTRL_5_RGL_BANK_ID_4 0x356BFC #define mmSIF_RTR_CTRL_5_RGL_BANK_ID_5 0x356C00 #define mmSIF_RTR_CTRL_5_RGL_BANK_ID_6 0x356C04 #define mmSIF_RTR_CTRL_5_RGL_BANK_ID_7 0x356C08 #define mmSIF_RTR_CTRL_5_RGL_WDT 0x356C2C #define mmSIF_RTR_CTRL_5_E2E_AR_HBM0_CH0_CTR_WRAP 0x356C30 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM0_CH1_CTR_WRAP 0x356C34 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM1_CH0_CTR_WRAP 0x356C38 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM1_CH1_CTR_WRAP 0x356C3C #define mmSIF_RTR_CTRL_5_E2E_AR_HBM2_CH0_CTR_WRAP 0x356C40 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM2_CH1_CTR_WRAP 0x356C44 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM3_CH0_CTR_WRAP 0x356C48 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM3_CH1_CTR_WRAP 0x356C4C #define mmSIF_RTR_CTRL_5_E2E_AR_HBM0_CH0_CTR_CNT 0x356C50 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM0_CH1_CTR_CNT 0x356C54 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM1_CH0_CTR_CNT 0x356C58 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM1_CH1_CTR_CNT 0x356C5C #define mmSIF_RTR_CTRL_5_E2E_AR_HBM2_CH0_CTR_CNT 0x356C60 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM2_CH1_CTR_CNT 0x356C64 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM3_CH0_CTR_CNT 0x356C68 #define mmSIF_RTR_CTRL_5_E2E_AR_HBM3_CH1_CTR_CNT 0x356C6C #define mmSIF_RTR_CTRL_5_E2E_AW_HBM0_CH0_CTR_WRAP 0x356C70 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM0_CH1_CTR_WRAP 0x356C74 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM1_CH0_CTR_WRAP 0x356C78 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM1_CH1_CTR_WRAP 0x356C7C #define mmSIF_RTR_CTRL_5_E2E_AW_HBM2_CH0_CTR_WRAP 0x356C80 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM2_CH1_CTR_WRAP 0x356C84 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM3_CH0_CTR_WRAP 0x356C88 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM3_CH1_CTR_WRAP 0x356C8C #define mmSIF_RTR_CTRL_5_E2E_AW_HBM0_CH0_CTR_CNT 0x356C90 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM0_CH1_CTR_CNT 0x356C94 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM1_CH0_CTR_CNT 0x356C98 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM1_CH1_CTR_CNT 0x356C9C #define mmSIF_RTR_CTRL_5_E2E_AW_HBM2_CH0_CTR_CNT 0x356CA0 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM2_CH1_CTR_CNT 0x356CA4 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM3_CH0_CTR_CNT 0x356CA8 #define mmSIF_RTR_CTRL_5_E2E_AW_HBM3_CH1_CTR_CNT 0x356CAC #define mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_0 0x356CB0 #define mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_1 0x356CB4 #define mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_2 0x356CB8 #define mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_3 0x356CBC #endif /* ASIC_REG_SIF_RTR_CTRL_5_REGS_H_ */