/* * ARM Ltd. Juno Platform * * Copyright (c) 2013-2014 ARM Ltd. * * This file is licensed under a dual GPLv2 or BSD license. */ /dts-v1/; #include / { model = "ARM Juno development board (r0)"; compatible = "arm,juno", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; aliases { serial0 = &soc_uart0; }; chosen { stdout-path = "serial0:115200n8"; }; psci { compatible = "arm,psci-0.2"; method = "smc"; }; cpus { #address-cells = <2>; #size-cells = <0>; A57_0: cpu@0 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x0 0x0>; device_type = "cpu"; enable-method = "psci"; }; A57_1: cpu@1 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x0 0x1>; device_type = "cpu"; enable-method = "psci"; }; A53_0: cpu@100 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x100>; device_type = "cpu"; enable-method = "psci"; }; A53_1: cpu@101 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x101>; device_type = "cpu"; enable-method = "psci"; }; A53_2: cpu@102 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x102>; device_type = "cpu"; enable-method = "psci"; }; A53_3: cpu@103 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x103>; device_type = "cpu"; enable-method = "psci"; }; }; memory@80000000 { device_type = "memory"; /* last 16MB of the first memory area is reserved for secure world use by firmware */ reg = <0x00000000 0x80000000 0x0 0x7f000000>, <0x00000008 0x80000000 0x1 0x80000000>; }; gic: interrupt-controller@2c001000 { compatible = "arm,gic-400", "arm,cortex-a15-gic"; reg = <0x0 0x2c010000 0 0x1000>, <0x0 0x2c02f000 0 0x2000>, <0x0 0x2c04f000 0 0x2000>, <0x0 0x2c06f000 0 0x2000>; #address-cells = <0>; #interrupt-cells = <3>; interrupt-controller; interrupts = ; }; timer { compatible = "arm,armv8-timer"; interrupts = , , , ; }; pmu { compatible = "arm,armv8-pmuv3"; interrupts = , , , , , ; }; /include/ "juno-clocks.dtsi" dma@7ff00000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0x7ff00000 0 0x1000>; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; interrupts = , , , , , , , ; clocks = <&soc_faxiclk>; clock-names = "apb_pclk"; }; soc_uart0: uart@7ff80000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0x7ff80000 0x0 0x1000>; interrupts = ; clocks = <&soc_uartclk>, <&soc_refclk100mhz>; clock-names = "uartclk", "apb_pclk"; }; i2c@7ffa0000 { compatible = "snps,designware-i2c"; reg = <0x0 0x7ffa0000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupts = ; clock-frequency = <400000>; i2c-sda-hold-time-ns = <500>; clocks = <&soc_smc50mhz>; dvi0: dvi-transmitter@70 { compatible = "nxp,tda998x"; reg = <0x70>; }; dvi1: dvi-transmitter@71 { compatible = "nxp,tda998x"; reg = <0x71>; }; }; ohci@7ffb0000 { compatible = "generic-ohci"; reg = <0x0 0x7ffb0000 0x0 0x10000>; interrupts = ; clocks = <&soc_usb48mhz>; }; ehci@7ffc0000 { compatible = "generic-ehci"; reg = <0x0 0x7ffc0000 0x0 0x10000>; interrupts = ; clocks = <&soc_usb48mhz>; }; memory-controller@7ffd0000 { compatible = "arm,pl354", "arm,primecell"; reg = <0 0x7ffd0000 0 0x1000>; interrupts = , ; clocks = <&soc_smc50mhz>; clock-names = "apb_pclk"; }; smb { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; ranges = <0 0 0 0x08000000 0x04000000>, <1 0 0 0x14000000 0x04000000>, <2 0 0 0x18000000 0x04000000>, <3 0 0 0x1c000000 0x04000000>, <4 0 0 0x0c000000 0x04000000>, <5 0 0 0x10000000 0x04000000>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 15>; interrupt-map = <0 0 0 &gic 0 68 IRQ_TYPE_LEVEL_HIGH>, <0 0 1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>, <0 0 2 &gic 0 70 IRQ_TYPE_LEVEL_HIGH>, <0 0 3 &gic 0 160 IRQ_TYPE_LEVEL_HIGH>, <0 0 4 &gic 0 161 IRQ_TYPE_LEVEL_HIGH>, <0 0 5 &gic 0 162 IRQ_TYPE_LEVEL_HIGH>, <0 0 6 &gic 0 163 IRQ_TYPE_LEVEL_HIGH>, <0 0 7 &gic 0 164 IRQ_TYPE_LEVEL_HIGH>, <0 0 8 &gic 0 165 IRQ_TYPE_LEVEL_HIGH>, <0 0 9 &gic 0 166 IRQ_TYPE_LEVEL_HIGH>, <0 0 10 &gic 0 167 IRQ_TYPE_LEVEL_HIGH>, <0 0 11 &gic 0 168 IRQ_TYPE_LEVEL_HIGH>, <0 0 12 &gic 0 169 IRQ_TYPE_LEVEL_HIGH>; /include/ "juno-motherboard.dtsi" }; };