OMAP SSI controller bindings

Required properties:
- compatible:		Should be set to the following value
                        ti,omap3-ssi (applicable to OMAP34xx devices)
- ti,hwmods:		Name of the hwmod associated to the controller, which
			is "ssi".
- reg:			Contains SSI register address range (base address and
			length).
- reg-names:		Contains the names of the address ranges. It's
                        expected, that "sys" and "gdd" address ranges are
			provided.
- interrupts: 		Contains the interrupt information for the controller.
- interrupt-names:      Contains the names of the interrupts. It's expected,
			that "gdd_mpu" is provided.
- ranges		Required as an empty node
- #address-cells	Should be set to <1>
- #size-cells		Should be set to <1>

Each port is represented as a sub-node of the ti,omap3-ssi device.

Required Port sub-node properties:
- compatible:		Should be set to the following value
                        ti,omap3-ssi-port (applicable to OMAP34xx devices)
- reg:			Contains port's register address range (base address
			and length).
- reg-names:		Contains the names of the address ranges. It's
                        expected, that "tx" and "rx" address ranges are
			provided.
- interrupt-parent	Should be a phandle for the interrupt controller
- interrupts:		Contains the interrupt information for the port.
- interrupt-names:	Contains the names of the interrupts. It's expected,
			that "mpu_irq0" and "mpu_irq1" are provided.
- ti,ssi-cawake-gpio:	Defines which GPIO pin is used to signify CAWAKE
			events for the port. This is an optional board-specific
			property. If it's missing the port will not be
			enabled.

Example for Nokia N900:

ssi-controller@48058000 {
	compatible = "ti,omap3-ssi";
	ti,hwmods = "ssi";

	reg = <0x48058000 0x1000>,
	      <0x48059000 0x1000>;
	reg-names = "sys",
		    "gdd";

	interrupts = <55>;
	interrupt-names = "gdd_mpu";

	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	ssi-port@0 {
		compatible = "ti,omap3-ssi-port";

		reg = <0x4805a000 0x800>,
		      <0x4805a800 0x800>;
		reg-names = "tx",
			    "rx";

		interrupt-parent = <&intc>;
		interrupts = <51>,
			     <52>;
		interrupt-names = "mpu_irq0",
				  "mpu_irq1";

		ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
	}
}