From d724b578a1f746db6fc1fd5e4cbba554a855dc8d Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Sat, 20 Aug 2022 18:15:30 +0900 Subject: kbuild: do not deduplicate modules.order The AWK code was added to deduplicate modules.order in case $(obj-m) contains the same module multiple times, but it is actually unneeded since commit b2c885549122 ("kbuild: update modules.order only when contained modules are updated"). The list is already deduplicated before being processed by AWK because $^ is the deduplicated list of prerequisites. (Please note the real-prereqs macro uses $^) Yet, modules.order will contain duplication if two different Makefiles build the same module: foo/Makefile: obj-m += bar/baz.o foo/bar/Makefile: obj-m += baz.o However, the parallel builds cannot properly handle this case in the first place. So, it is better to let it fail (as already done by scripts/modules-check.sh). Signed-off-by: Masahiro Yamada --- scripts/Makefile.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'scripts/Makefile.build') diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 784f46d41959..0df488d0bbb0 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -374,7 +374,7 @@ $(obj)/built-in.a: $(real-obj-y) FORCE cmd_modules_order = { $(foreach m, $(real-prereqs), \ $(if $(filter %/modules.order, $m), cat $m, echo $(patsubst %.o,%.ko,$m));) :; } \ - | $(AWK) '!x[$$0]++' - > $@ + > $@ $(obj)/modules.order: $(obj-m) FORCE $(call if_changed,modules_order) -- cgit v1.2.3 From cc306abd19e8acdd85072b162d09e80408389cd8 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 6 Sep 2022 15:13:06 +0900 Subject: kbuild: fix and refactor single target build The single target build has a subtle bug for the combination for an individual file and a subdirectory. [1] 'make kernel/fork.i' builds only kernel/fork.i $ make kernel/fork.i CALL scripts/checksyscalls.sh DESCEND objtool CPP kernel/fork.i [2] 'make kernel/' builds only under the kernel/ directory. $ make kernel/ CALL scripts/checksyscalls.sh DESCEND objtool CC kernel/fork.o CC kernel/exec_domain.o [snip] CC kernel/rseq.o AR kernel/built-in.a But, if you try to do [1] and [2] in a single command, you will get only [1] with a weird log: $ make kernel/fork.i kernel/ CALL scripts/checksyscalls.sh DESCEND objtool CPP kernel/fork.i make[2]: Nothing to be done for 'kernel/'. With 'make kernel/fork.i kernel/', you should get both [1] and [2]. Rewrite the single target build. Signed-off-by: Masahiro Yamada --- Makefile | 9 ++++----- scripts/Makefile.build | 54 +++++++++++++++----------------------------------- 2 files changed, 20 insertions(+), 43 deletions(-) (limited to 'scripts/Makefile.build') diff --git a/Makefile b/Makefile index f9756ff7c750..b0a3cba5af94 100644 --- a/Makefile +++ b/Makefile @@ -1819,11 +1819,11 @@ single_modpost: $(single-no-ko) modules_prepare $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost $(Q)rm -f $(MODORDER) -export KBUILD_SINGLE_TARGETS := $(addprefix $(extmod_prefix), $(single-no-ko)) +single-goals := $(addprefix $(extmod_prefix), $(single-no-ko)) # trim unrelated directories build-dirs := $(foreach d, $(build-dirs), \ - $(if $(filter $(d)/%, $(KBUILD_SINGLE_TARGETS)), $(d))) + $(if $(filter $d/%, $(single-goals)), $d)) endif @@ -1835,9 +1835,8 @@ endif PHONY += descend $(build-dirs) descend: $(build-dirs) $(build-dirs): prepare - $(Q)$(MAKE) $(build)=$@ \ - single-build=$(if $(filter-out $@/, $(filter $@/%, $(KBUILD_SINGLE_TARGETS))),1) \ - need-builtin=1 need-modorder=1 + $(Q)$(MAKE) $(build)=$@ need-builtin=1 need-modorder=1 \ + $(filter $@/%, $(single-goals)) clean-dirs := $(addprefix _clean_, $(clean-dirs)) PHONY += $(clean-dirs) clean diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 0df488d0bbb0..91d2e5461a3e 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -5,8 +5,8 @@ src := $(obj) -PHONY := __build -__build: +PHONY := $(obj)/ +$(obj)/: # Init all relevant variables used in kbuild files so # 1) they have correct type @@ -323,7 +323,7 @@ $(obj)/%.o: $(src)/%.S FORCE targets += $(filter-out $(subdir-builtin), $(real-obj-y)) targets += $(filter-out $(subdir-modorder), $(real-obj-m)) -targets += $(real-dtb-y) $(lib-y) $(always-y) $(MAKECMDGOALS) +targets += $(real-dtb-y) $(lib-y) $(always-y) # Linker scripts preprocessor (.lds.S -> .lds) # --------------------------------------------------------------------------- @@ -400,8 +400,6 @@ $(multi-obj-m): %.o: %.mod FORCE $(call if_changed_rule,ld_multi_m) $(call multi_depend, $(multi-obj-m), .o, -objs -y -m) -targets := $(filter-out $(PHONY), $(targets)) - # Add intermediate targets: # When building objects with specific suffix patterns, add intermediate # targets that the final targets are derived from. @@ -420,52 +418,29 @@ targets += $(call intermediate_targets, .asn1.o, .asn1.c .asn1.h) \ # Build # --------------------------------------------------------------------------- -ifdef single-build - -KBUILD_SINGLE_TARGETS := $(filter $(obj)/%, $(KBUILD_SINGLE_TARGETS)) - -curdir-single := $(sort $(foreach x, $(KBUILD_SINGLE_TARGETS), \ - $(if $(filter $(x) $(basename $(x)).o, $(targets)), $(x)))) - -# Handle single targets without any rule: show "Nothing to be done for ..." or -# "No rule to make target ..." depending on whether the target exists. -unknown-single := $(filter-out $(addsuffix /%, $(subdir-ym)), \ - $(filter-out $(curdir-single), $(KBUILD_SINGLE_TARGETS))) - -single-subdirs := $(foreach d, $(subdir-ym), \ - $(if $(filter $(d)/%, $(KBUILD_SINGLE_TARGETS)), $(d))) - -__build: $(curdir-single) $(single-subdirs) -ifneq ($(unknown-single),) - $(Q)$(MAKE) -f /dev/null $(unknown-single) -endif +$(obj)/: $(if $(KBUILD_BUILTIN), $(targets-for-builtin)) \ + $(if $(KBUILD_MODULES), $(targets-for-modules)) \ + $(subdir-ym) $(always-y) @: -ifeq ($(curdir-single),) -# Nothing to do in this directory. Do not include any .*.cmd file for speed-up -targets := -else -targets += $(curdir-single) -endif +# Single targets +# --------------------------------------------------------------------------- -else +single-subdirs := $(foreach d, $(subdir-ym), $(if $(filter $d/%, $(MAKECMDGOALS)), $d)) +single-subdir-goals := $(filter $(addsuffix /%, $(single-subdirs)), $(MAKECMDGOALS)) -__build: $(if $(KBUILD_BUILTIN), $(targets-for-builtin)) \ - $(if $(KBUILD_MODULES), $(targets-for-modules)) \ - $(subdir-ym) $(always-y) +$(single-subdir-goals): $(single-subdirs) @: -endif - # Descending # --------------------------------------------------------------------------- PHONY += $(subdir-ym) $(subdir-ym): $(Q)$(MAKE) $(build)=$@ \ - $(if $(filter $@/, $(KBUILD_SINGLE_TARGETS)),single-build=) \ need-builtin=$(if $(filter $@/built-in.a, $(subdir-builtin)),1) \ - need-modorder=$(if $(filter $@/modules.order, $(subdir-modorder)),1) + need-modorder=$(if $(filter $@/modules.order, $(subdir-modorder)),1) \ + $(filter $@/%, $(single-subdir-goals)) # Add FORCE to the prequisites of a target to force it to be always rebuilt. # --------------------------------------------------------------------------- @@ -474,6 +449,9 @@ PHONY += FORCE FORCE: +targets += $(filter-out $(single-subdir-goals), $(MAKECMDGOALS)) +targets := $(filter-out $(PHONY), $(targets)) + # Read all saved command lines and dependencies for the $(targets) we # may be building above, using $(if_changed{,_dep}). As an # optimization, we don't need to read them if the target does not -- cgit v1.2.3