From 03813d9b7d4368d4a8c9bb8f5a2a1e23dac8f1b5 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 7 Dec 2020 11:50:50 +0100 Subject: clk: Trace clk_set_rate() "range" functions The clk_set_rate "range" functions don't have any tracepoints even though it might be useful. Add some. Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20201207105050.2096917-1-maxime@cerno.tech [sboyd@kernel.org: Reword commit text] Signed-off-by: Stephen Boyd --- include/trace/events/clk.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'include') diff --git a/include/trace/events/clk.h b/include/trace/events/clk.h index cb1aea25c199..e19edc63ee95 100644 --- a/include/trace/events/clk.h +++ b/include/trace/events/clk.h @@ -118,6 +118,50 @@ DEFINE_EVENT(clk_rate, clk_set_rate_complete, TP_ARGS(core, rate) ); +DEFINE_EVENT(clk_rate, clk_set_min_rate, + + TP_PROTO(struct clk_core *core, unsigned long rate), + + TP_ARGS(core, rate) +); + +DEFINE_EVENT(clk_rate, clk_set_max_rate, + + TP_PROTO(struct clk_core *core, unsigned long rate), + + TP_ARGS(core, rate) +); + +DECLARE_EVENT_CLASS(clk_rate_range, + + TP_PROTO(struct clk_core *core, unsigned long min, unsigned long max), + + TP_ARGS(core, min, max), + + TP_STRUCT__entry( + __string( name, core->name ) + __field(unsigned long, min ) + __field(unsigned long, max ) + ), + + TP_fast_assign( + __assign_str(name, core->name); + __entry->min = min; + __entry->max = max; + ), + + TP_printk("%s min %lu max %lu", __get_str(name), + (unsigned long)__entry->min, + (unsigned long)__entry->max) +); + +DEFINE_EVENT(clk_rate_range, clk_set_rate_range, + + TP_PROTO(struct clk_core *core, unsigned long min, unsigned long max), + + TP_ARGS(core, min, max) +); + DECLARE_EVENT_CLASS(clk_parent, TP_PROTO(struct clk_core *core, struct clk_core *parent), -- cgit v1.2.3 From 3d86ee17d4670406d07f92da6fa4f2aa82cdc5a2 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 19 Nov 2020 17:43:08 +0200 Subject: dt-bindings: clock: at91: add sama7g5 pll defines Add SAMA7G5 specific PLL defines to be referenced in a phandle as a PMC_TYPE_CORE clock. Suggested-by: Claudiu Beznea Signed-off-by: Eugen Hristev [claudiu.beznea@microchip.com: adapt comit message, adapt sama7g5.c] Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/1605800597-16720-3-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd --- drivers/clk/at91/sama7g5.c | 6 +++--- include/dt-bindings/clock/at91.h | 10 ++++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index a092a940baa4..7ef7963126b6 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -182,13 +182,13 @@ static const struct { .p = "audiopll_fracck", .l = &pll_layout_divpmc, .t = PLL_TYPE_DIV, - .eid = PMC_I2S0_MUX, }, + .eid = PMC_AUDIOPMCPLL, }, { .n = "audiopll_diviock", .p = "audiopll_fracck", .l = &pll_layout_divio, .t = PLL_TYPE_DIV, - .eid = PMC_I2S1_MUX, }, + .eid = PMC_AUDIOIOPLL, }, }, [PLL_ID_ETH] = { @@ -835,7 +835,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) if (IS_ERR(regmap)) return; - sama7g5_pmc = pmc_data_allocate(PMC_I2S1_MUX + 1, + sama7g5_pmc = pmc_data_allocate(PMC_ETHPLL + 1, nck(sama7g5_systemck), nck(sama7g5_periphck), nck(sama7g5_gck), 8); diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h index eba17106608b..fab313f62e8f 100644 --- a/include/dt-bindings/clock/at91.h +++ b/include/dt-bindings/clock/at91.h @@ -25,6 +25,16 @@ #define PMC_PLLBCK 8 #define PMC_AUDIOPLLCK 9 +/* SAMA7G5 */ +#define PMC_CPUPLL (PMC_MAIN + 1) +#define PMC_SYSPLL (PMC_MAIN + 2) +#define PMC_DDRPLL (PMC_MAIN + 3) +#define PMC_IMGPLL (PMC_MAIN + 4) +#define PMC_BAUDPLL (PMC_MAIN + 5) +#define PMC_AUDIOPMCPLL (PMC_MAIN + 6) +#define PMC_AUDIOIOPLL (PMC_MAIN + 7) +#define PMC_ETHPLL (PMC_MAIN + 8) + #ifndef AT91_PMC_MOSCS #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ #define AT91_PMC_LOCKA 1 /* PLLA Lock */ -- cgit v1.2.3 From 91f3bf0d5315ea3f139ae440f2b7772ecdcd67ec Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 19 Nov 2020 17:43:17 +0200 Subject: clk: at91: sama7g5: register cpu clock Register CPU clock as being the master clock prescaler. This would be used by DVFS. The block schema of SAMA7G5's PMC contains also a divider between master clock prescaler and CPU (PMC_CPU_RATIO.RATIO) but the frequencies supported by SAMA7G5 could be directly received from CPUPLL + master clock prescaler and the extra divider would do no work in case it would be enabled. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/1605800597-16720-12-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd --- drivers/clk/at91/sama7g5.c | 13 ++++++------- include/dt-bindings/clock/at91.h | 1 + 2 files changed, 7 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 927eb3b2b126..a6e20b35960e 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -904,7 +904,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) if (IS_ERR(regmap)) return; - sama7g5_pmc = pmc_data_allocate(PMC_ETHPLL + 1, + sama7g5_pmc = pmc_data_allocate(PMC_CPU + 1, nck(sama7g5_systemck), nck(sama7g5_periphck), nck(sama7g5_gck), 8); @@ -981,18 +981,17 @@ static void __init sama7g5_pmc_setup(struct device_node *np) } } - parent_names[0] = md_slck_name; - parent_names[1] = "mainck"; - parent_names[2] = "cpupll_divpmcck"; - parent_names[3] = "syspll_divpmcck"; - hw = at91_clk_register_master_pres(regmap, "mck0_pres", 4, parent_names, + parent_names[0] = "cpupll_divpmcck"; + hw = at91_clk_register_master_pres(regmap, "cpuck", 1, parent_names, &mck0_layout, &mck0_characteristics, &pmc_mck0_lock, CLK_SET_RATE_PARENT, 0); if (IS_ERR(hw)) goto err_free; - hw = at91_clk_register_master_div(regmap, "mck0_div", "mck0_pres", + sama7g5_pmc->chws[PMC_CPU] = hw; + + hw = at91_clk_register_master_div(regmap, "mck0", "cpuck", &mck0_layout, &mck0_characteristics, &pmc_mck0_lock, 0); if (IS_ERR(hw)) diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h index fab313f62e8f..98e1b2ab6403 100644 --- a/include/dt-bindings/clock/at91.h +++ b/include/dt-bindings/clock/at91.h @@ -34,6 +34,7 @@ #define PMC_AUDIOPMCPLL (PMC_MAIN + 6) #define PMC_AUDIOIOPLL (PMC_MAIN + 7) #define PMC_ETHPLL (PMC_MAIN + 8) +#define PMC_CPU (PMC_MAIN + 9) #ifndef AT91_PMC_MOSCS #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ -- cgit v1.2.3