From 89c07fd14fe857c223b042a857a08c3ea46b92eb Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 24 Jan 2007 12:31:47 +0000 Subject: [MIPS] Fix APM build Definitions for TIF_FREEZE and _TIF_FREEZE were missing. Signed-off-by: Ralf Baechle --- include/asm-mips/thread_info.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h index e475c45ea263..fbcda8204473 100644 --- a/include/asm-mips/thread_info.h +++ b/include/asm-mips/thread_info.h @@ -118,6 +118,7 @@ register struct thread_info *__current_thread_info __asm__("$28"); #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 18 +#define TIF_FREEZE 19 #define TIF_SYSCALL_TRACE 31 /* syscall trace active */ #define _TIF_SYSCALL_TRACE (1< Date: Wed, 24 Jan 2007 22:22:06 +0900 Subject: [MIPS] vr41xx: need one more nop with mtc0_tlbw_hazard() NEC VR4111 and VR4121 need one more nop with mtc0_tlbw_hazard(). Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- include/asm-mips/hazards.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 0fe02945feba..50073157a617 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -157,7 +157,7 @@ ASMMACRO(back_to_back_c0_hazard, * processors. */ ASMMACRO(mtc0_tlbw_hazard, - nop + nop; nop ) ASMMACRO(tlbw_use_hazard, nop; nop; nop -- cgit v1.2.3 From 66218da212bf141532d678a699f5789c78145ab1 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Wed, 24 Jan 2007 15:43:34 +0900 Subject: [MIPS] Fix wrong checksum calculation on 64-bit MIPS The commit 8e3d8433d8c22ca6c42cba4a67d300c39aae7822 ([NET]: MIPS checksum annotations and cleanups) broke 64-bit MIPS. The problem is the commit replaces some unsigned long with __be32. On 64bit MIPS, a __be32 (i.e. unsigned int) value is represented as a sign-extented 32-bit value in a 64-bit argument register. So the address 192.168.0.1 (0xc0a80001) is passed as 0xffffffffc0a80001 to csum_tcpudp_nofold() but the asm code in the function expects 0x00000000c0a80001, therefore it returns a wrong checksum. Explicit cast to unsigned long is needed to drop high 32bit. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/checksum.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h index 24cdcc6eaab8..20a81e1548f5 100644 --- a/include/asm-mips/checksum.h +++ b/include/asm-mips/checksum.h @@ -159,7 +159,8 @@ static inline __wsum csum_tcpudp_nofold(__be32 saddr, #endif " .set pop" : "=r" (sum) - : "0" (daddr), "r"(saddr), + : "0" ((__force unsigned long)daddr), + "r" ((__force unsigned long)saddr), #ifdef __MIPSEL__ "r" ((proto + len) << 8), #else -- cgit v1.2.3