From dbaf381ffbf3acd4ac9a987f567a2b1a5edf6e62 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Tue, 9 Sep 2014 17:13:25 +0800 Subject: ARM: clk-imx6sl: refine clock tree for SSI Each SSI has "ssi", "ssi_ipg" clocks, and they share same gate bits. Signed-off-by: Shengjiu Wang Signed-off-by: Shawn Guo --- include/dt-bindings/clock/imx6sl-clock.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include/dt-bindings') diff --git a/include/dt-bindings/clock/imx6sl-clock.h b/include/dt-bindings/clock/imx6sl-clock.h index f10a928fe2dd..9ce4e421096f 100644 --- a/include/dt-bindings/clock/imx6sl-clock.h +++ b/include/dt-bindings/clock/imx6sl-clock.h @@ -171,6 +171,9 @@ #define IMX6SL_PLL5_BYPASS 158 #define IMX6SL_PLL6_BYPASS 159 #define IMX6SL_PLL7_BYPASS 160 -#define IMX6SL_CLK_END 161 +#define IMX6SL_CLK_SSI1_IPG 161 +#define IMX6SL_CLK_SSI2_IPG 162 +#define IMX6SL_CLK_SSI3_IPG 163 +#define IMX6SL_CLK_END 164 #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */ -- cgit v1.2.3