From 18f48a4f1d49d522285b5a9f3c5d984f4fdaae01 Mon Sep 17 00:00:00 2001 From: Ashwini Ghuge Date: Mon, 18 Nov 2013 18:40:41 +0530 Subject: ARM: tegra: add port FF to GPIO IDs NVIDIA Tegra124 supports has the new GPIO port as GPIO_FF. Add the macro for this port name. Signed-off-by: Ashwini Ghuge Signed-off-by: Laxman Dewangan Reviewed-by: Thierry Reding Signed-off-by: Stephen Warren --- include/dt-bindings/gpio/tegra-gpio.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/dt-bindings') diff --git a/include/dt-bindings/gpio/tegra-gpio.h b/include/dt-bindings/gpio/tegra-gpio.h index 4d179c00f081..197dc28b676e 100644 --- a/include/dt-bindings/gpio/tegra-gpio.h +++ b/include/dt-bindings/gpio/tegra-gpio.h @@ -43,6 +43,7 @@ #define TEGRA_GPIO_BANK_ID_CC 28 #define TEGRA_GPIO_BANK_ID_DD 29 #define TEGRA_GPIO_BANK_ID_EE 30 +#define TEGRA_GPIO_BANK_ID_FF 31 #define TEGRA_GPIO(bank, offset) \ ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset) -- cgit v1.2.3 From b758df2e2af6bbd100fad85473dcf49c2f31d39a Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Thu, 5 Dec 2013 16:14:06 +0530 Subject: ARM: tegra: Add header file for pinctrl constants This new header file defines pincontrol constants for Tegra to use from Tegra's DTS file for pincontrol properties option. Signed-off-by: Laxman Dewangan Reviewed-by: Thierry Reding Signed-off-by: Stephen Warren --- include/dt-bindings/pinctrl/pinctrl-tegra.h | 45 +++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra.h (limited to 'include/dt-bindings') diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra.h b/include/dt-bindings/pinctrl/pinctrl-tegra.h new file mode 100644 index 000000000000..ebafa498be0f --- /dev/null +++ b/include/dt-bindings/pinctrl/pinctrl-tegra.h @@ -0,0 +1,45 @@ +/* + * This header provides constants for Tegra pinctrl bindings. + * + * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * + * Author: Laxman Dewangan + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H +#define _DT_BINDINGS_PINCTRL_TEGRA_H + +/* + * Enable/disable for diffeent dt properties. This is applicable for + * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain, + * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt. + */ +#define TEGRA_PIN_DISABLE 0 +#define TEGRA_PIN_ENABLE 1 + +#define TEGRA_PIN_PULL_NONE 0 +#define TEGRA_PIN_PULL_DOWN 1 +#define TEGRA_PIN_PULL_UP 2 + +/* Low power mode driver */ +#define TEGRA_PIN_LP_DRIVE_DIV_8 0 +#define TEGRA_PIN_LP_DRIVE_DIV_4 1 +#define TEGRA_PIN_LP_DRIVE_DIV_2 2 +#define TEGRA_PIN_LP_DRIVE_DIV_1 3 + +/* Rising/Falling slew rate */ +#define TEGRA_PIN_SLEW_RATE_FASTEST 0 +#define TEGRA_PIN_SLEW_RATE_FAST 1 +#define TEGRA_PIN_SLEW_RATE_SLOW 2 +#define TEGRA_PIN_SLEW_RATE_SLOWEST 3 + +#endif -- cgit v1.2.3 From 9d90951a39205206a46609055717af9bfb436e4d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 19 Dec 2013 16:51:01 +0100 Subject: ARM: shmobile: r8a7790: Add MSIOF clocks in device tree Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 17 +++++++++++++---- include/dt-bindings/clock/r8a7790-clock.h | 6 ++++++ 2 files changed, 19 insertions(+), 4 deletions(-) (limited to 'include/dt-bindings') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 71ec31c6d9b6..9c9a9920acce 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -524,6 +524,14 @@ }; /* Gate clocks */ + mstp0_clks: mstp0_clks@e6150130 { + compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; + clocks = <&mp_clk>; + #clock-cells = <1>; + renesas,clock-indices = ; + clock-output-names = "msiof0"; + }; mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; @@ -544,15 +552,16 @@ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, - <&mp_clk>; + <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>; #clock-cells = <1>; renesas,clock-indices = < R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0 - R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 R8A7790_CLK_SCIFB2 + R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 + R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2 >; clock-output-names = - "scifa2", "scifa1", "scifa0", "scifb0", "scifb1", - "scifb2"; + "scifa2", "scifa1", "scifa0", "msiof2", "scifb0", + "scifb1", "msiof1", "msiof3", "scifb2"; }; mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 420f0b00ae1e..bbabb8e80113 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -22,6 +22,9 @@ #define R8A7790_CLK_SD1 8 #define R8A7790_CLK_Z 9 +/* MSTP0 */ +#define R8A7790_CLK_MSIOF0 0 + /* MSTP1 */ #define R8A7790_CLK_TMU1 11 #define R8A7790_CLK_TMU3 21 @@ -37,8 +40,11 @@ #define R8A7790_CLK_SCIFA2 2 #define R8A7790_CLK_SCIFA1 3 #define R8A7790_CLK_SCIFA0 4 +#define R8A7790_CLK_MSIOF2 5 #define R8A7790_CLK_SCIFB0 6 #define R8A7790_CLK_SCIFB1 7 +#define R8A7790_CLK_MSIOF1 8 +#define R8A7790_CLK_MSIOF3 15 #define R8A7790_CLK_SCIFB2 16 #define R8A7790_CLK_SYS_DMAC0 18 #define R8A7790_CLK_SYS_DMAC1 19 -- cgit v1.2.3 From cded80f869aef94853e056ab9c21e305b0c26138 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 19 Dec 2013 16:51:02 +0100 Subject: ARM: shmobile: r8a7791: Add MSIOF clocks in device tree Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 17 +++++++++++++---- include/dt-bindings/clock/r8a7791-clock.h | 5 +++++ 2 files changed, 18 insertions(+), 4 deletions(-) (limited to 'include/dt-bindings') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 0a8219258145..6a29341462cf 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -394,6 +394,14 @@ }; /* Gate clocks */ + mstp0_clks: mstp0_clks@e6150130 { + compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; + clocks = <&mp_clk>; + #clock-cells = <1>; + renesas,clock-indices = ; + clock-output-names = "msiof0"; + }; mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; @@ -413,15 +421,16 @@ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, - <&mp_clk>; + <&mp_clk>, <&mp_clk>, <&mp_clk>; #clock-cells = <1>; renesas,clock-indices = < R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0 - R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1 R8A7791_CLK_SCIFB2 + R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1 + R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2 >; clock-output-names = - "scifa2", "scifa1", "scifa0", "scifb0", "scifb1", - "scifb2"; + "scifa2", "scifa1", "scifa0", "misof2", "scifb0", + "scifb1", "msiof1", "scifb2"; }; mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index df1715b77f96..a69e090c83cf 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -21,6 +21,9 @@ #define R8A7791_CLK_SD0 7 #define R8A7791_CLK_Z 8 +/* MSTP0 */ +#define R8A7791_CLK_MSIOF0 0 + /* MSTP1 */ #define R8A7791_CLK_TMU1 11 #define R8A7791_CLK_TMU3 21 @@ -35,8 +38,10 @@ #define R8A7791_CLK_SCIFA2 2 #define R8A7791_CLK_SCIFA1 3 #define R8A7791_CLK_SCIFA0 4 +#define R8A7791_CLK_MSIOF2 5 #define R8A7791_CLK_SCIFB0 6 #define R8A7791_CLK_SCIFB1 7 +#define R8A7791_CLK_MSIOF1 8 #define R8A7791_CLK_SCIFB2 16 #define R8A7791_CLK_DMAC 18 -- cgit v1.2.3 From 91b56ca10a3cf4999bae5f8b8e7e2723bf4b1363 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 19 Dec 2013 16:51:03 +0100 Subject: ARM: shmobile: r8a7790: Add QSPI module clock in device tree Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 11 +++++++---- include/dt-bindings/clock/r8a7790-clock.h | 1 + 2 files changed, 8 insertions(+), 4 deletions(-) (limited to 'include/dt-bindings') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 9c9a9920acce..a1791250bf4b 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -615,13 +615,16 @@ mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; - clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>; + clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, + <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_I2C3 - R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0 + R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD + R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 + R8A7790_CLK_I2C0 >; - clock-output-names = "rcan1", "rcan0", "i2c3", "i2c2", "i2c1", "i2c0"; + clock-output-names = + "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0"; }; }; }; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index bbabb8e80113..859e9be511d9 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -97,6 +97,7 @@ #define R8A7790_CLK_GPIO0 12 #define R8A7790_CLK_RCAN1 15 #define R8A7790_CLK_RCAN0 16 +#define R8A7790_CLK_QSPI_MOD 17 #define R8A7790_CLK_IICDVFS 26 #define R8A7790_CLK_I2C3 28 #define R8A7790_CLK_I2C2 29 -- cgit v1.2.3 From ec71f55216db1b3da68e284840cb3ac3d5ed4965 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 19 Dec 2013 16:51:04 +0100 Subject: ARM: shmobile: r8a7791: Add QSPI module clock in device tree Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 15 ++++++++------- include/dt-bindings/clock/r8a7791-clock.h | 1 + 2 files changed, 9 insertions(+), 7 deletions(-) (limited to 'include/dt-bindings') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 6a29341462cf..19c65509a22d 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -482,17 +482,18 @@ mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; - clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, - <&p_clk>, <&p_clk>, <&p_clk>; + clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, + <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, + <&p_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_I2C4 - R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2 - R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 + R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD + R8A7791_CLK_I2C4 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 + R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 >; clock-output-names = - "rcan1", "rcan0", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", - "i2c0"; + "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", + "i2c2", "i2c1", "i2c0"; }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index a69e090c83cf..30f82f286e29 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -94,6 +94,7 @@ #define R8A7791_CLK_GPIO0 12 #define R8A7791_CLK_RCAN1 15 #define R8A7791_CLK_RCAN0 16 +#define R8A7791_CLK_QSPI_MOD 17 #define R8A7791_CLK_I2C5 25 #define R8A7791_CLK_IICDVFS 26 #define R8A7791_CLK_I2C4 27 -- cgit v1.2.3 From 6dea2c1ebc6fc43852fd6125d75a75da223ff707 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 19 Dec 2013 16:51:05 +0100 Subject: ARM: shmobile: r8a7790: Add SSI clocks in device tree Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 20 ++++++++++++++++++++ include/dt-bindings/clock/r8a7790-clock.h | 13 +++++++++++++ 2 files changed, 33 insertions(+) (limited to 'include/dt-bindings') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index a1791250bf4b..c5417dafca0d 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -626,5 +626,25 @@ clock-output-names = "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0"; }; + mstp10_clks: mstp10_clks@e6150998 { + compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; + clocks = <&p_clk>, <&mstp10_clks R8A7790_CLK_SSI>, + <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, + <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, + <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, + <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, + <&mstp10_clks R8A7790_CLK_SSI>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7790_CLK_SSI R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 + R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5 + R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 + R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 + >; + clock-output-names = + "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", + "ssi4", "ssi3", "ssi2", "ssi1", "ssi0"; + }; }; }; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 859e9be511d9..dbb262a3e7a6 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -104,4 +104,17 @@ #define R8A7790_CLK_I2C1 30 #define R8A7790_CLK_I2C0 31 +/* MSTP10 */ +#define R8A7790_CLK_SSI 5 +#define R8A7790_CLK_SSI9 6 +#define R8A7790_CLK_SSI8 7 +#define R8A7790_CLK_SSI7 8 +#define R8A7790_CLK_SSI6 9 +#define R8A7790_CLK_SSI5 10 +#define R8A7790_CLK_SSI4 11 +#define R8A7790_CLK_SSI3 12 +#define R8A7790_CLK_SSI2 13 +#define R8A7790_CLK_SSI1 14 +#define R8A7790_CLK_SSI0 15 + #endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */ -- cgit v1.2.3 From b652896b02df3dfde3a68957cce01f2aa4585842 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 19 Dec 2013 16:51:06 +0100 Subject: ARM: shmobile: r8a7791: Add SSI clocks in device tree Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 20 ++++++++++++++++++++ include/dt-bindings/clock/r8a7791-clock.h | 13 +++++++++++++ 2 files changed, 33 insertions(+) (limited to 'include/dt-bindings') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 19c65509a22d..e92c1f7aedd0 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -495,6 +495,26 @@ "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; }; + mstp10_clks: mstp10_clks@e6150998 { + compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; + clocks = <&p_clk>, <&mstp10_clks R8A7791_CLK_SSI>, + <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, + <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, + <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, + <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, + <&mstp10_clks R8A7791_CLK_SSI>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7791_CLK_SSI R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 + R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5 + R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 + R8A7791_CLK_SSI1 R8A7791_CLK_SSI0 + >; + clock-output-names = + "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", + "ssi4", "ssi3", "ssi2", "ssi1", "ssi0"; + }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 30f82f286e29..1c8f00d0d88b 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -103,6 +103,19 @@ #define R8A7791_CLK_I2C1 30 #define R8A7791_CLK_I2C0 31 +/* MSTP10 */ +#define R8A7791_CLK_SSI 5 +#define R8A7791_CLK_SSI9 6 +#define R8A7791_CLK_SSI8 7 +#define R8A7791_CLK_SSI7 8 +#define R8A7791_CLK_SSI6 9 +#define R8A7791_CLK_SSI5 10 +#define R8A7791_CLK_SSI4 11 +#define R8A7791_CLK_SSI3 12 +#define R8A7791_CLK_SSI2 13 +#define R8A7791_CLK_SSI1 14 +#define R8A7791_CLK_SSI0 15 + /* MSTP11 */ #define R8A7791_CLK_SCIFA3 6 #define R8A7791_CLK_SCIFA4 7 -- cgit v1.2.3 From 4d0810257a7f1d040526a6dc5bde5a4737994a7e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 26 Dec 2013 14:15:47 +0900 Subject: Revert "ARM: shmobile: r8a7790: Add SSI clocks in device tree" This reverts commit 6dea2c1ebc6fc43852fd6125d75a75da223ff707. Unfortunately this commit prevents multiplatform from booting to the point where a serial console is available. Revert it while a solution is sought. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 20 -------------------- include/dt-bindings/clock/r8a7790-clock.h | 13 ------------- 2 files changed, 33 deletions(-) (limited to 'include/dt-bindings') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index c5417dafca0d..a1791250bf4b 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -626,25 +626,5 @@ clock-output-names = "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0"; }; - mstp10_clks: mstp10_clks@e6150998 { - compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; - reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; - clocks = <&p_clk>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>; - #clock-cells = <1>; - renesas,clock-indices = < - R8A7790_CLK_SSI R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 - R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5 - R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 - R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 - >; - clock-output-names = - "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", - "ssi4", "ssi3", "ssi2", "ssi1", "ssi0"; - }; }; }; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index dbb262a3e7a6..859e9be511d9 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -104,17 +104,4 @@ #define R8A7790_CLK_I2C1 30 #define R8A7790_CLK_I2C0 31 -/* MSTP10 */ -#define R8A7790_CLK_SSI 5 -#define R8A7790_CLK_SSI9 6 -#define R8A7790_CLK_SSI8 7 -#define R8A7790_CLK_SSI7 8 -#define R8A7790_CLK_SSI6 9 -#define R8A7790_CLK_SSI5 10 -#define R8A7790_CLK_SSI4 11 -#define R8A7790_CLK_SSI3 12 -#define R8A7790_CLK_SSI2 13 -#define R8A7790_CLK_SSI1 14 -#define R8A7790_CLK_SSI0 15 - #endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */ -- cgit v1.2.3 From 3effae8c26f451a9d572255c08dfbe342dd1dc98 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 26 Dec 2013 14:16:54 +0900 Subject: Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree" This reverts commit b652896b02df3dfde3a68957cce01f2aa4585842. Unfortunately this commit prevents multiplatform from booting to the point where a serial console is available. Revert it while a solution is sought. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 20 -------------------- include/dt-bindings/clock/r8a7791-clock.h | 13 ------------- 2 files changed, 33 deletions(-) (limited to 'include/dt-bindings') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index e92c1f7aedd0..19c65509a22d 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -495,26 +495,6 @@ "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; }; - mstp10_clks: mstp10_clks@e6150998 { - compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; - reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; - clocks = <&p_clk>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>; - #clock-cells = <1>; - renesas,clock-indices = < - R8A7791_CLK_SSI R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 - R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5 - R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 - R8A7791_CLK_SSI1 R8A7791_CLK_SSI0 - >; - clock-output-names = - "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", - "ssi4", "ssi3", "ssi2", "ssi1", "ssi0"; - }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 1c8f00d0d88b..30f82f286e29 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -103,19 +103,6 @@ #define R8A7791_CLK_I2C1 30 #define R8A7791_CLK_I2C0 31 -/* MSTP10 */ -#define R8A7791_CLK_SSI 5 -#define R8A7791_CLK_SSI9 6 -#define R8A7791_CLK_SSI8 7 -#define R8A7791_CLK_SSI7 8 -#define R8A7791_CLK_SSI6 9 -#define R8A7791_CLK_SSI5 10 -#define R8A7791_CLK_SSI4 11 -#define R8A7791_CLK_SSI3 12 -#define R8A7791_CLK_SSI2 13 -#define R8A7791_CLK_SSI1 14 -#define R8A7791_CLK_SSI0 15 - /* MSTP11 */ #define R8A7791_CLK_SCIFA3 6 #define R8A7791_CLK_SCIFA4 7 -- cgit v1.2.3