From cec2076e432e9c41856e5c0672210fbbe011b2ad Mon Sep 17 00:00:00 2001 From: Alex Elder Date: Tue, 10 Nov 2020 15:59:21 -0600 Subject: net: ipa: move GSI command opcode values into "gsi_reg.h" The gsi_ch_cmd_opcode, gsi_evt_cmd_opcode, and gsi_generic_cmd_opcode enumerated types are values that fields in the GSI command registers can take on. Move their definitions out of "gsi.c" and into "gsi_reg.h", alongside the definition of registers they are associated with. Signed-off-by: Alex Elder Signed-off-by: Jakub Kicinski --- drivers/net/ipa/gsi.c | 22 ---------------------- drivers/net/ipa/gsi_reg.h | 19 +++++++++++++++++++ 2 files changed, 19 insertions(+), 22 deletions(-) (limited to 'drivers') diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index e6f2df3b72cf..608f64712be3 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -109,28 +109,6 @@ struct gsi_event { u8 chid; }; -/* Hardware values representing an event ring immediate command opcode */ -enum gsi_evt_cmd_opcode { - GSI_EVT_ALLOCATE = 0x0, - GSI_EVT_RESET = 0x9, - GSI_EVT_DE_ALLOC = 0xa, -}; - -/* Hardware values representing a generic immediate command opcode */ -enum gsi_generic_cmd_opcode { - GSI_GENERIC_HALT_CHANNEL = 0x1, - GSI_GENERIC_ALLOCATE_CHANNEL = 0x2, -}; - -/* Hardware values representing a channel immediate command opcode */ -enum gsi_ch_cmd_opcode { - GSI_CH_ALLOCATE = 0x0, - GSI_CH_START = 0x1, - GSI_CH_STOP = 0x2, - GSI_CH_RESET = 0x9, - GSI_CH_DE_ALLOC = 0xa, -}; - /** gsi_channel_scratch_gpi - GPI protocol scratch register * @max_outstanding_tre: * Defines the maximum number of TREs allowed in a single transaction diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h index d46e3300dff7..de3d87d278a9 100644 --- a/drivers/net/ipa/gsi_reg.h +++ b/drivers/net/ipa/gsi_reg.h @@ -223,6 +223,14 @@ enum gsi_channel_type { (0x0001f008 + 0x4000 * (ee)) #define CH_CHID_FMASK GENMASK(7, 0) #define CH_OPCODE_FMASK GENMASK(31, 24) +/** enum gsi_ch_cmd_opcode - CH_OPCODE field values in CH_CMD */ +enum gsi_ch_cmd_opcode { + GSI_CH_ALLOCATE = 0x0, + GSI_CH_START = 0x1, + GSI_CH_STOP = 0x2, + GSI_CH_RESET = 0x9, + GSI_CH_DE_ALLOC = 0xa, +}; #define GSI_EV_CH_CMD_OFFSET \ GSI_EE_N_EV_CH_CMD_OFFSET(GSI_EE_AP) @@ -230,6 +238,12 @@ enum gsi_channel_type { (0x0001f010 + 0x4000 * (ee)) #define EV_CHID_FMASK GENMASK(7, 0) #define EV_OPCODE_FMASK GENMASK(31, 24) +/** enum gsi_evt_cmd_opcode - EV_OPCODE field values in EV_CH_CMD */ +enum gsi_evt_cmd_opcode { + GSI_EVT_ALLOCATE = 0x0, + GSI_EVT_RESET = 0x9, + GSI_EVT_DE_ALLOC = 0xa, +}; #define GSI_GENERIC_CMD_OFFSET \ GSI_EE_N_GENERIC_CMD_OFFSET(GSI_EE_AP) @@ -238,6 +252,11 @@ enum gsi_channel_type { #define GENERIC_OPCODE_FMASK GENMASK(4, 0) #define GENERIC_CHID_FMASK GENMASK(9, 5) #define GENERIC_EE_FMASK GENMASK(13, 10) +/** enum gsi_generic_cmd_opcode - GENERIC_OPCODE field values in GENERIC_CMD */ +enum gsi_generic_cmd_opcode { + GSI_GENERIC_HALT_CHANNEL = 0x1, + GSI_GENERIC_ALLOCATE_CHANNEL = 0x2, +}; #define GSI_GSI_HW_PARAM_2_OFFSET \ GSI_EE_N_GSI_HW_PARAM_2_OFFSET(GSI_EE_AP) -- cgit v1.2.3