From b5dea62d34042d173ba1d1887c8dd40262423d68 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 30 Aug 2019 15:45:09 +0200 Subject: clk: renesas: rcar-gen3: Improve arithmetic divisions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Use div64_ul() instead of div_u64() if the divisor is unsigned long, to avoid truncation to 32-bit on 64-bit platforms, - Use div_u64() for 64-by-32 divisions. Signed-off-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund Link: https://lore.kernel.org/r/20190830134515.11925-3-geert+renesas@glider.be --- drivers/clk/renesas/rcar-gen3-cpg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index d25c8ba00a65..c594bc067c3b 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -122,10 +122,10 @@ static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned int mult; prate = *parent_rate / zclk->fixed_div; - mult = div_u64(rate * 32ULL, prate); + mult = div64_ul(rate * 32ULL, prate); mult = clamp(mult, 1U, 32U); - return (u64)prate * mult / 32; + return div_u64((u64)prate * mult, 32); } static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate, -- cgit v1.2.3