From 7df222c35920569c7f31d177a7249c70139008f1 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 4 Feb 2021 00:15:36 +0100 Subject: drm/msm/disp/mdp5: mdp5_cfg: Fix msm8974v2 max_clk The maximum mdp clock rate on msm8974v2 is 320MHz. Fix it. Signed-off-by: Konrad Dybcio Reviewed-by: Abhinav Kumar Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c index df10c1ac7591..94ce62a26daf 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c @@ -177,7 +177,7 @@ static const struct mdp5_cfg_hw msm8x74v2_config = { [3] = INTF_HDMI, }, }, - .max_clk = 200000000, + .max_clk = 320000000, }; static const struct mdp5_cfg_hw apq8084_config = { -- cgit v1.2.3