From 8854eed1a4f588d75b96ae13c38d41156dbd3e54 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 6 Jun 2019 17:08:12 +1000 Subject: drm/nouveau/core: pass subdev into nvkm_firmware_get, rather than device It'd be nice to have FW loading debug messages to appear for the relevant subsystem, when enabled. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h | 7 ++----- drivers/gpu/drm/nouveau/nvkm/core/firmware.c | 5 +++-- drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 4 +--- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c | 8 ++++---- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c | 6 +++--- 6 files changed, 14 insertions(+), 18 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h b/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h index ff0fa38aee72..d0fe98bd50fd 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h @@ -1,12 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __NVKM_FIRMWARE_H__ #define __NVKM_FIRMWARE_H__ +#include -#include - -int nvkm_firmware_get(struct nvkm_device *device, const char *fwname, +int nvkm_firmware_get(const struct nvkm_subdev *, const char *fwname, const struct firmware **fw); - void nvkm_firmware_put(const struct firmware *fw); - #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/core/firmware.c b/drivers/gpu/drm/nouveau/nvkm/core/firmware.c index 058ff46b5f16..87728133ff93 100644 --- a/drivers/gpu/drm/nouveau/nvkm/core/firmware.c +++ b/drivers/gpu/drm/nouveau/nvkm/core/firmware.c @@ -24,7 +24,7 @@ /** * nvkm_firmware_get - load firmware from the official nvidia/chip/ directory - * @device device that will use that firmware + * @subdev subdevice that will use that firmware * @fwname name of firmware file to load * @fw firmware structure to load to * @@ -32,9 +32,10 @@ * Firmware files released by NVIDIA will always follow this format. */ int -nvkm_firmware_get(struct nvkm_device *device, const char *fwname, +nvkm_firmware_get(const struct nvkm_subdev *subdev, const char *fwname, const struct firmware **fw) { + struct nvkm_device *device = subdev->device; char f[64]; char cname[16]; int i; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c index 81a13cf9a292..c578deb5867a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c @@ -2115,12 +2115,10 @@ int gf100_gr_ctor_fw(struct gf100_gr *gr, const char *fwname, struct gf100_gr_fuc *fuc) { - struct nvkm_subdev *subdev = &gr->base.engine.subdev; - struct nvkm_device *device = subdev->device; const struct firmware *fw; int ret; - ret = nvkm_firmware_get(device, fwname, &fw); + ret = nvkm_firmware_get(&gr->base.engine.subdev, fwname, &fw); if (ret) { ret = gf100_gr_ctor_fw_legacy(gr, fwname, fuc, ret); if (ret) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr.c index 75dc06557877..dc80985cf093 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr.c @@ -36,7 +36,7 @@ nvkm_acr_load_firmware(const struct nvkm_subdev *subdev, const char *name, void *blob; int ret; - ret = nvkm_firmware_get(subdev->device, name, &fw); + ret = nvkm_firmware_get(subdev, name, &fw); if (ret) return ERR_PTR(ret); if (fw->size < min_size) { diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c index 1b0c793c0192..0d71a9e40c3e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c @@ -98,22 +98,22 @@ ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img, int ret; snprintf(f, sizeof(f), "gr/%s_bl", falcon_name); - ret = nvkm_firmware_get(subdev->device, f, &bl); + ret = nvkm_firmware_get(subdev, f, &bl); if (ret) goto error; snprintf(f, sizeof(f), "gr/%s_inst", falcon_name); - ret = nvkm_firmware_get(subdev->device, f, &code); + ret = nvkm_firmware_get(subdev, f, &code); if (ret) goto free_bl; snprintf(f, sizeof(f), "gr/%s_data", falcon_name); - ret = nvkm_firmware_get(subdev->device, f, &data); + ret = nvkm_firmware_get(subdev, f, &data); if (ret) goto free_inst; snprintf(f, sizeof(f), "gr/%s_sig", falcon_name); - ret = nvkm_firmware_get(subdev->device, f, &sig); + ret = nvkm_firmware_get(subdev, f, &sig); if (ret) goto free_data; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c index 1e1f1c635cab..5b9874619e53 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c @@ -46,7 +46,7 @@ acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name, int ret; snprintf(f, sizeof(f), "%s/image", name); - ret = nvkm_firmware_get(subdev->device, f, &image); + ret = nvkm_firmware_get(subdev, f, &image); if (ret) return ret; img->ucode_data = kmemdup(image->data, image->size, GFP_KERNEL); @@ -55,7 +55,7 @@ acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name, return -ENOMEM; snprintf(f, sizeof(f), "%s/desc", name); - ret = nvkm_firmware_get(subdev->device, f, &desc); + ret = nvkm_firmware_get(subdev, f, &desc); if (ret) return ret; memcpy(&img->ucode_desc, desc->data, sizeof(img->ucode_desc)); @@ -63,7 +63,7 @@ acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name, nvkm_firmware_put(desc); snprintf(f, sizeof(f), "%s/sig", name); - ret = nvkm_firmware_get(subdev->device, f, &sig); + ret = nvkm_firmware_get(subdev, f, &sig); if (ret) return ret; img->sig_size = sig->size; -- cgit v1.2.3 From 475cf02b834599c8a7a21a1e2d11449b7217d856 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 22 May 2019 16:15:54 +1000 Subject: drm/nouveau/core: support versioned firmware loading We have a need for this now with updated SEC2 LS FW images that have an incompatible interface from the previous version. Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/include/nvkm/core/firmware.h | 7 +++-- drivers/gpu/drm/nouveau/nvkm/core/firmware.c | 30 +++++++++++++++++++--- 2 files changed, 31 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h b/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h index d0fe98bd50fd..54da9c6bc8d5 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h @@ -3,7 +3,10 @@ #define __NVKM_FIRMWARE_H__ #include +int nvkm_firmware_get_version(const struct nvkm_subdev *, const char *fwname, + int min_version, int max_version, + const struct firmware **); int nvkm_firmware_get(const struct nvkm_subdev *, const char *fwname, - const struct firmware **fw); -void nvkm_firmware_put(const struct firmware *fw); + const struct firmware **); +void nvkm_firmware_put(const struct firmware *); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/core/firmware.c b/drivers/gpu/drm/nouveau/nvkm/core/firmware.c index 87728133ff93..092acdec2c39 100644 --- a/drivers/gpu/drm/nouveau/nvkm/core/firmware.c +++ b/drivers/gpu/drm/nouveau/nvkm/core/firmware.c @@ -32,8 +32,9 @@ * Firmware files released by NVIDIA will always follow this format. */ int -nvkm_firmware_get(const struct nvkm_subdev *subdev, const char *fwname, - const struct firmware **fw) +nvkm_firmware_get_version(const struct nvkm_subdev *subdev, const char *fwname, + int min_version, int max_version, + const struct firmware **fw) { struct nvkm_device *device = subdev->device; char f[64]; @@ -49,8 +50,29 @@ nvkm_firmware_get(const struct nvkm_subdev *subdev, const char *fwname, cname[i] = tolower(cname[i]); } - snprintf(f, sizeof(f), "nvidia/%s/%s.bin", cname, fwname); - return request_firmware(fw, f, device->dev); + for (i = max_version; i >= min_version; i--) { + if (i != 0) + snprintf(f, sizeof(f), "nvidia/%s/%s-%d.bin", cname, fwname, i); + else + snprintf(f, sizeof(f), "nvidia/%s/%s.bin", cname, fwname); + + if (!firmware_request_nowarn(fw, f, device->dev)) { + nvkm_debug(subdev, "firmware \"%s\" loaded\n", f); + return i; + } + + nvkm_debug(subdev, "firmware \"%s\" unavailable\n", f); + } + + nvkm_error(subdev, "failed to load firmware \"%s\"", fwname); + return -ENOENT; +} + +int +nvkm_firmware_get(const struct nvkm_subdev *subdev, const char *fwname, + const struct firmware **fw) +{ + return nvkm_firmware_get_version(subdev, fwname, 0, 0, fw); } /** -- cgit v1.2.3 From c26f3061fe514d4fa27e9ef33a3da799deb3930a Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 6 Jun 2019 15:38:25 +1000 Subject: drm/nouveau/secboot: pass max supported FW version to LS load funcs Will be passed to the FW loader function as an upper bound on the supported FW version to attempt to load. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 6 +++--- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h | 4 +++- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c | 5 +++-- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h | 12 ++++++++---- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c | 14 ++++++++------ .../drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c | 12 +++++++----- 6 files changed, 32 insertions(+), 21 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c index 1df09ed6fe6d..df666fb03f5f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c @@ -243,6 +243,7 @@ acr_r352_ls_ucode_img_load(const struct acr_r352 *acr, enum nvkm_secboot_falcon falcon_id) { const struct nvkm_subdev *subdev = acr->base.subdev; + const struct acr_r352_ls_func *func = acr->func->ls_func[falcon_id]; struct ls_ucode_img_r352 *img; int ret; @@ -252,9 +253,8 @@ acr_r352_ls_ucode_img_load(const struct acr_r352 *acr, img->base.falcon_id = falcon_id; - ret = acr->func->ls_func[falcon_id]->load(sb, &img->base); - - if (ret) { + ret = func->load(sb, func->version_max, &img->base); + if (ret < 0) { kfree(img->base.ucode_data); kfree(img->base.sig); kfree(img); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h index 3d58ab871563..f29c2268c026 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h @@ -57,12 +57,14 @@ hsf_load_header_app_size(const struct hsf_load_header *hdr, u32 app) * @lhdr_flags: LS flags */ struct acr_r352_ls_func { - int (*load)(const struct nvkm_secboot *, struct ls_ucode_img *); + int (*load)(const struct nvkm_secboot *, int maxver, + struct ls_ucode_img *); void (*generate_bl_desc)(const struct nvkm_acr *, const struct ls_ucode_img *, u64, void *); u32 bl_desc_size; int (*post_run)(const struct nvkm_acr *, const struct nvkm_secboot *); u32 lhdr_flags; + int version_max; }; struct acr_r352; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c index 978ad0790367..7c2424d73083 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c @@ -111,6 +111,7 @@ acr_r367_ls_ucode_img_load(const struct acr_r352 *acr, enum nvkm_secboot_falcon falcon_id) { const struct nvkm_subdev *subdev = acr->base.subdev; + const struct acr_r352_ls_func *func = acr->func->ls_func[falcon_id]; struct ls_ucode_img_r367 *img; int ret; @@ -120,8 +121,8 @@ acr_r367_ls_ucode_img_load(const struct acr_r352 *acr, img->base.falcon_id = falcon_id; - ret = acr->func->ls_func[falcon_id]->load(sb, &img->base); - if (ret) { + ret = func->load(sb, func->version_max, &img->base); + if (ret < 0) { kfree(img->base.ucode_data); kfree(img->base.sig); kfree(img); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h index 9b7c402594e8..d43f906da3a7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h @@ -147,11 +147,15 @@ struct fw_bl_desc { u32 data_size; }; -int acr_ls_ucode_load_fecs(const struct nvkm_secboot *, struct ls_ucode_img *); -int acr_ls_ucode_load_gpccs(const struct nvkm_secboot *, struct ls_ucode_img *); -int acr_ls_ucode_load_pmu(const struct nvkm_secboot *, struct ls_ucode_img *); +int acr_ls_ucode_load_fecs(const struct nvkm_secboot *, int, + struct ls_ucode_img *); +int acr_ls_ucode_load_gpccs(const struct nvkm_secboot *, int, + struct ls_ucode_img *); +int acr_ls_ucode_load_pmu(const struct nvkm_secboot *, int, + struct ls_ucode_img *); int acr_ls_pmu_post_run(const struct nvkm_acr *, const struct nvkm_secboot *); -int acr_ls_ucode_load_sec2(const struct nvkm_secboot *, struct ls_ucode_img *); +int acr_ls_ucode_load_sec2(const struct nvkm_secboot *, int, + struct ls_ucode_img *); int acr_ls_sec2_post_run(const struct nvkm_acr *, const struct nvkm_secboot *); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c index 0d71a9e40c3e..821d3b2bdb1f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c @@ -90,8 +90,8 @@ ls_ucode_img_build(const struct firmware *bl, const struct firmware *code, * blob. Also generate the corresponding ucode descriptor. */ static int -ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img, - const char *falcon_name) +ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, int maxver, + struct ls_ucode_img *img, const char *falcon_name) { const struct firmware *bl, *code, *data, *sig; char f[64]; @@ -146,13 +146,15 @@ error: } int -acr_ls_ucode_load_fecs(const struct nvkm_secboot *sb, struct ls_ucode_img *img) +acr_ls_ucode_load_fecs(const struct nvkm_secboot *sb, int maxver, + struct ls_ucode_img *img) { - return ls_ucode_img_load_gr(&sb->subdev, img, "fecs"); + return ls_ucode_img_load_gr(&sb->subdev, maxver, img, "fecs"); } int -acr_ls_ucode_load_gpccs(const struct nvkm_secboot *sb, struct ls_ucode_img *img) +acr_ls_ucode_load_gpccs(const struct nvkm_secboot *sb, int maxver, + struct ls_ucode_img *img) { - return ls_ucode_img_load_gr(&sb->subdev, img, "gpccs"); + return ls_ucode_img_load_gr(&sb->subdev, maxver, img, "gpccs"); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c index 5b9874619e53..5a7a55e831a4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c @@ -39,7 +39,7 @@ */ static int acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name, - struct ls_ucode_img *img) + int maxver, struct ls_ucode_img *img) { const struct firmware *image, *desc, *sig; char f[64]; @@ -99,12 +99,13 @@ acr_ls_msgqueue_post_run(struct nvkm_msgqueue *queue, } int -acr_ls_ucode_load_pmu(const struct nvkm_secboot *sb, struct ls_ucode_img *img) +acr_ls_ucode_load_pmu(const struct nvkm_secboot *sb, int maxver, + struct ls_ucode_img *img) { struct nvkm_pmu *pmu = sb->subdev.device->pmu; int ret; - ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "pmu", img); + ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "pmu", maxver, img); if (ret) return ret; @@ -136,12 +137,13 @@ acr_ls_pmu_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb) } int -acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, struct ls_ucode_img *img) +acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, int maxver, + struct ls_ucode_img *img) { struct nvkm_sec2 *sec = sb->subdev.device->sec2; int ret; - ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", img); + ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", maxver, img); if (ret) return ret; -- cgit v1.2.3 From 5f0f8b573a792805b9ea326cd4a81f6414f7ddc5 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 6 Jun 2019 15:57:14 +1000 Subject: drm/nouveau/secboot: split out FW version-specific LS function pointers It's not enough to have per-falcon structures anymore, we have multiple versions of some firmware now that have interface differences. Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 50 ++++++++++++++++------ .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h | 22 +++++++--- .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c | 48 +++++++++++++++++---- .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c | 14 +++--- .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c | 36 +++++++++++++--- .../gpu/drm/nouveau/nvkm/subdev/secboot/acr_r375.c | 12 +++++- 6 files changed, 141 insertions(+), 41 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c index df666fb03f5f..4fd4cfe459b8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c @@ -229,6 +229,8 @@ struct acr_r352_lsf_wpr_header { struct ls_ucode_img_r352 { struct ls_ucode_img base; + const struct acr_r352_lsf_func *func; + struct acr_r352_lsf_wpr_header wpr_header; struct acr_r352_lsf_lsb_header lsb_header; }; @@ -261,6 +263,8 @@ acr_r352_ls_ucode_img_load(const struct acr_r352 *acr, return ERR_PTR(ret); } + img->func = func->version[ret]; + /* Check that the signature size matches our expectations... */ if (img->base.sig_size != sizeof(img->lsb_header.signature)) { nvkm_error(subdev, "invalid signature size for %s falcon!\n", @@ -302,8 +306,7 @@ acr_r352_ls_img_fill_headers(struct acr_r352 *acr, struct acr_r352_lsf_wpr_header *whdr = &img->wpr_header; struct acr_r352_lsf_lsb_header *lhdr = &img->lsb_header; struct ls_ucode_img_desc *desc = &_img->ucode_desc; - const struct acr_r352_ls_func *func = - acr->func->ls_func[_img->falcon_id]; + const struct acr_r352_lsf_func *func = img->func; /* Fill WPR header */ whdr->falcon_id = _img->falcon_id; @@ -419,8 +422,8 @@ acr_r352_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs, /* Figure out how large we need gdesc to be. */ list_for_each_entry(_img, imgs, node) { - const struct acr_r352_ls_func *ls_func = - acr->func->ls_func[_img->falcon_id]; + struct ls_ucode_img_r352 *img = ls_ucode_img_r352(_img); + const struct acr_r352_lsf_func *ls_func = img->func; max_desc_size = max(max_desc_size, ls_func->bl_desc_size); } @@ -433,8 +436,7 @@ acr_r352_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs, list_for_each_entry(_img, imgs, node) { struct ls_ucode_img_r352 *img = ls_ucode_img_r352(_img); - const struct acr_r352_ls_func *ls_func = - acr->func->ls_func[_img->falcon_id]; + const struct acr_r352_lsf_func *ls_func = img->func; nvkm_gpuobj_memcpy_to(wpr_blob, pos, &img->wpr_header, sizeof(img->wpr_header)); @@ -1063,20 +1065,36 @@ acr_r352_dtor(struct nvkm_acr *_acr) kfree(acr); } +static const struct acr_r352_lsf_func +acr_r352_ls_fecs_func_0 = { + .generate_bl_desc = acr_r352_generate_flcn_bl_desc, + .bl_desc_size = sizeof(struct acr_r352_flcn_bl_desc), +}; + const struct acr_r352_ls_func acr_r352_ls_fecs_func = { .load = acr_ls_ucode_load_fecs, + .version_max = 0, + .version = { + &acr_r352_ls_fecs_func_0, + } +}; + +static const struct acr_r352_lsf_func +acr_r352_ls_gpccs_func_0 = { .generate_bl_desc = acr_r352_generate_flcn_bl_desc, .bl_desc_size = sizeof(struct acr_r352_flcn_bl_desc), + /* GPCCS will be loaded using PRI */ + .lhdr_flags = LSF_FLAG_FORCE_PRIV_LOAD, }; const struct acr_r352_ls_func acr_r352_ls_gpccs_func = { .load = acr_ls_ucode_load_gpccs, - .generate_bl_desc = acr_r352_generate_flcn_bl_desc, - .bl_desc_size = sizeof(struct acr_r352_flcn_bl_desc), - /* GPCCS will be loaded using PRI */ - .lhdr_flags = LSF_FLAG_FORCE_PRIV_LOAD, + .version_max = 0, + .version = { + &acr_r352_ls_gpccs_func_0, + } }; @@ -1150,12 +1168,20 @@ acr_r352_generate_pmu_bl_desc(const struct nvkm_acr *acr, desc->argv = addr_args; } +static const struct acr_r352_lsf_func +acr_r352_ls_pmu_func_0 = { + .generate_bl_desc = acr_r352_generate_pmu_bl_desc, + .bl_desc_size = sizeof(struct acr_r352_pmu_bl_desc), +}; + static const struct acr_r352_ls_func acr_r352_ls_pmu_func = { .load = acr_ls_ucode_load_pmu, - .generate_bl_desc = acr_r352_generate_pmu_bl_desc, - .bl_desc_size = sizeof(struct acr_r352_pmu_bl_desc), .post_run = acr_ls_pmu_post_run, + .version_max = 0, + .version = { + &acr_r352_ls_pmu_func_0, + } }; const struct acr_r352_func diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h index f29c2268c026..e516cab849dd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h @@ -47,24 +47,32 @@ hsf_load_header_app_size(const struct hsf_load_header *hdr, u32 app) } /** - * struct acr_r352_ls_func - manages a single LS firmware + * struct acr_r352_lsf_func - manages a specific LS firmware version * - * @load: load the external firmware into a ls_ucode_img * @generate_bl_desc: function called on a block of bl_desc_size to generate the * proper bootloader descriptor for this LS firmware * @bl_desc_size: size of the bootloader descriptor - * @post_run: hook called right after the ACR is executed * @lhdr_flags: LS flags */ -struct acr_r352_ls_func { - int (*load)(const struct nvkm_secboot *, int maxver, - struct ls_ucode_img *); +struct acr_r352_lsf_func { void (*generate_bl_desc)(const struct nvkm_acr *, const struct ls_ucode_img *, u64, void *); u32 bl_desc_size; - int (*post_run)(const struct nvkm_acr *, const struct nvkm_secboot *); u32 lhdr_flags; +}; + +/** + * struct acr_r352_ls_func - manages a single LS falcon + * + * @load: load the external firmware into a ls_ucode_img + * @post_run: hook called right after the ACR is executed + */ +struct acr_r352_ls_func { + int (*load)(const struct nvkm_secboot *, int maxver, + struct ls_ucode_img *); + int (*post_run)(const struct nvkm_acr *, const struct nvkm_secboot *); int version_max; + const struct acr_r352_lsf_func *version[]; }; struct acr_r352; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c index 14b36ef93628..71f85b16ef34 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c @@ -66,20 +66,36 @@ acr_r361_generate_hs_bl_desc(const struct hsf_load_header *hdr, void *_bl_desc, bl_desc->data_size = hdr->data_size; } +static const struct acr_r352_lsf_func +acr_r361_ls_fecs_func_0 = { + .generate_bl_desc = acr_r361_generate_flcn_bl_desc, + .bl_desc_size = sizeof(struct acr_r361_flcn_bl_desc), +}; + const struct acr_r352_ls_func acr_r361_ls_fecs_func = { .load = acr_ls_ucode_load_fecs, + .version_max = 0, + .version = { + &acr_r361_ls_fecs_func_0, + } +}; + +static const struct acr_r352_lsf_func +acr_r361_ls_gpccs_func_0 = { .generate_bl_desc = acr_r361_generate_flcn_bl_desc, .bl_desc_size = sizeof(struct acr_r361_flcn_bl_desc), + /* GPCCS will be loaded using PRI */ + .lhdr_flags = LSF_FLAG_FORCE_PRIV_LOAD, }; const struct acr_r352_ls_func acr_r361_ls_gpccs_func = { .load = acr_ls_ucode_load_gpccs, - .generate_bl_desc = acr_r361_generate_flcn_bl_desc, - .bl_desc_size = sizeof(struct acr_r361_flcn_bl_desc), - /* GPCCS will be loaded using PRI */ - .lhdr_flags = LSF_FLAG_FORCE_PRIV_LOAD, + .version_max = 0, + .version = { + &acr_r361_ls_gpccs_func_0, + } }; struct acr_r361_pmu_bl_desc { @@ -125,12 +141,20 @@ acr_r361_generate_pmu_bl_desc(const struct nvkm_acr *acr, desc->argv = addr_args; } +static const struct acr_r352_lsf_func +acr_r361_ls_pmu_func_0 = { + .generate_bl_desc = acr_r361_generate_pmu_bl_desc, + .bl_desc_size = sizeof(struct acr_r361_pmu_bl_desc), +}; + const struct acr_r352_ls_func acr_r361_ls_pmu_func = { .load = acr_ls_ucode_load_pmu, - .generate_bl_desc = acr_r361_generate_pmu_bl_desc, - .bl_desc_size = sizeof(struct acr_r361_pmu_bl_desc), .post_run = acr_ls_pmu_post_run, + .version_max = 0, + .version = { + &acr_r361_ls_pmu_func_0, + } }; static void @@ -164,12 +188,20 @@ acr_r361_generate_sec2_bl_desc(const struct nvkm_acr *acr, desc->argv = 0x01000000; } +static const struct acr_r352_lsf_func +acr_r361_ls_sec2_func_0 = { + .generate_bl_desc = acr_r361_generate_sec2_bl_desc, + .bl_desc_size = sizeof(struct acr_r361_pmu_bl_desc), +}; + const struct acr_r352_ls_func acr_r361_ls_sec2_func = { .load = acr_ls_ucode_load_sec2, - .generate_bl_desc = acr_r361_generate_sec2_bl_desc, - .bl_desc_size = sizeof(struct acr_r361_pmu_bl_desc), .post_run = acr_ls_sec2_post_run, + .version_max = 0, + .version = { + &acr_r361_ls_sec2_func_0, + } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c index 7c2424d73083..fe20a0977ba6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c @@ -100,6 +100,8 @@ struct acr_r367_lsf_wpr_header { struct ls_ucode_img_r367 { struct ls_ucode_img base; + const struct acr_r352_lsf_func *func; + struct acr_r367_lsf_wpr_header wpr_header; struct acr_r367_lsf_lsb_header lsb_header; }; @@ -129,6 +131,8 @@ acr_r367_ls_ucode_img_load(const struct acr_r352 *acr, return ERR_PTR(ret); } + img->func = func->version[ret]; + /* Check that the signature size matches our expectations... */ if (img->base.sig_size != sizeof(img->lsb_header.signature)) { nvkm_error(subdev, "invalid signature size for %s falcon!\n", @@ -159,8 +163,7 @@ acr_r367_ls_img_fill_headers(struct acr_r352 *acr, struct acr_r367_lsf_wpr_header *whdr = &img->wpr_header; struct acr_r367_lsf_lsb_header *lhdr = &img->lsb_header; struct ls_ucode_img_desc *desc = &_img->ucode_desc; - const struct acr_r352_ls_func *func = - acr->func->ls_func[_img->falcon_id]; + const struct acr_r352_lsf_func *func = img->func; /* Fill WPR header */ whdr->falcon_id = _img->falcon_id; @@ -270,8 +273,8 @@ acr_r367_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs, u8 *gdesc; list_for_each_entry(_img, imgs, node) { - const struct acr_r352_ls_func *ls_func = - acr->func->ls_func[_img->falcon_id]; + struct ls_ucode_img_r367 *img = ls_ucode_img_r367(_img); + const struct acr_r352_lsf_func *ls_func = img->func; max_desc_size = max(max_desc_size, ls_func->bl_desc_size); } @@ -284,8 +287,7 @@ acr_r367_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs, list_for_each_entry(_img, imgs, node) { struct ls_ucode_img_r367 *img = ls_ucode_img_r367(_img); - const struct acr_r352_ls_func *ls_func = - acr->func->ls_func[_img->falcon_id]; + const struct acr_r352_lsf_func *ls_func = img->func; nvkm_gpuobj_memcpy_to(wpr_blob, pos, &img->wpr_header, sizeof(img->wpr_header)); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c index 2f890dfae7fc..ff52d40823a9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c @@ -49,20 +49,36 @@ acr_r370_generate_flcn_bl_desc(const struct nvkm_acr *acr, desc->data_size = pdesc->app_resident_data_size; } +static const struct acr_r352_lsf_func +acr_r370_ls_fecs_func_0 = { + .generate_bl_desc = acr_r370_generate_flcn_bl_desc, + .bl_desc_size = sizeof(struct acr_r370_flcn_bl_desc), +}; + const struct acr_r352_ls_func acr_r370_ls_fecs_func = { .load = acr_ls_ucode_load_fecs, + .version_max = 0, + .version = { + &acr_r370_ls_fecs_func_0, + } +}; + +static const struct acr_r352_lsf_func +acr_r370_ls_gpccs_func_0 = { .generate_bl_desc = acr_r370_generate_flcn_bl_desc, .bl_desc_size = sizeof(struct acr_r370_flcn_bl_desc), + /* GPCCS will be loaded using PRI */ + .lhdr_flags = LSF_FLAG_FORCE_PRIV_LOAD, }; const struct acr_r352_ls_func acr_r370_ls_gpccs_func = { .load = acr_ls_ucode_load_gpccs, - .generate_bl_desc = acr_r370_generate_flcn_bl_desc, - .bl_desc_size = sizeof(struct acr_r370_flcn_bl_desc), - /* GPCCS will be loaded using PRI */ - .lhdr_flags = LSF_FLAG_FORCE_PRIV_LOAD, + .version_max = 0, + .version = { + &acr_r370_ls_gpccs_func_0, + } }; static void @@ -95,12 +111,20 @@ acr_r370_generate_sec2_bl_desc(const struct nvkm_acr *acr, desc->argv = 0x01000000; } +static const struct acr_r352_lsf_func +acr_r370_ls_sec2_func_0 = { + .generate_bl_desc = acr_r370_generate_sec2_bl_desc, + .bl_desc_size = sizeof(struct acr_r370_flcn_bl_desc), +}; + const struct acr_r352_ls_func acr_r370_ls_sec2_func = { .load = acr_ls_ucode_load_sec2, - .generate_bl_desc = acr_r370_generate_sec2_bl_desc, - .bl_desc_size = sizeof(struct acr_r370_flcn_bl_desc), .post_run = acr_ls_sec2_post_run, + .version_max = 0, + .version = { + &acr_r370_ls_sec2_func_0, + } }; void diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r375.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r375.c index 7bdef93cb7ae..8f0647766038 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r375.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r375.c @@ -54,12 +54,20 @@ acr_r375_generate_pmu_bl_desc(const struct nvkm_acr *acr, desc->argv = addr_args; } +static const struct acr_r352_lsf_func +acr_r375_ls_pmu_func_0 = { + .generate_bl_desc = acr_r375_generate_pmu_bl_desc, + .bl_desc_size = sizeof(struct acr_r370_flcn_bl_desc), +}; + const struct acr_r352_ls_func acr_r375_ls_pmu_func = { .load = acr_ls_ucode_load_pmu, - .generate_bl_desc = acr_r375_generate_pmu_bl_desc, - .bl_desc_size = sizeof(struct acr_r370_flcn_bl_desc), .post_run = acr_ls_pmu_post_run, + .version_max = 0, + .version = { + &acr_r375_ls_pmu_func_0, + } }; const struct acr_r352_func -- cgit v1.2.3 From 9352ce3775123603119419f8c44a6afe4c44e27e Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 6 Jun 2019 16:32:31 +1000 Subject: drm/nouveau/secboot: enable loading of versioned LS PMU/SEC2 ACR msgqueue FW Some chipsets will be switching to updated SEC2 LS firmware, so we need to plumb that through. Signed-off-by: Ben Skeggs --- .../nvkm/subdev/secboot/ls_ucode_msgqueue.c | 28 +++++++++++----------- 1 file changed, 14 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c index 5a7a55e831a4..77c13b096a67 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c @@ -43,28 +43,28 @@ acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name, { const struct firmware *image, *desc, *sig; char f[64]; - int ret; + int ver, ret; snprintf(f, sizeof(f), "%s/image", name); - ret = nvkm_firmware_get(subdev, f, &image); - if (ret) - return ret; + ver = nvkm_firmware_get_version(subdev, f, 0, maxver, &image); + if (ver < 0) + return ver; img->ucode_data = kmemdup(image->data, image->size, GFP_KERNEL); nvkm_firmware_put(image); if (!img->ucode_data) return -ENOMEM; snprintf(f, sizeof(f), "%s/desc", name); - ret = nvkm_firmware_get(subdev, f, &desc); - if (ret) + ret = nvkm_firmware_get_version(subdev, f, ver, ver, &desc); + if (ret < 0) return ret; memcpy(&img->ucode_desc, desc->data, sizeof(img->ucode_desc)); img->ucode_size = ALIGN(img->ucode_desc.app_start_offset + img->ucode_desc.app_size, 256); nvkm_firmware_put(desc); snprintf(f, sizeof(f), "%s/sig", name); - ret = nvkm_firmware_get(subdev, f, &sig); - if (ret) + ret = nvkm_firmware_get_version(subdev, f, ver, ver, &sig); + if (ret < 0) return ret; img->sig_size = sig->size; img->sig = kmemdup(sig->data, sig->size, GFP_KERNEL); @@ -72,7 +72,7 @@ acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name, if (!img->sig) return -ENOMEM; - return 0; + return ver; } static int @@ -141,11 +141,11 @@ acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, int maxver, struct ls_ucode_img *img) { struct nvkm_sec2 *sec = sb->subdev.device->sec2; - int ret; + int ver, ret; - ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", maxver, img); - if (ret) - return ret; + ver = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", maxver, img); + if (ver < 0) + return ver; /* Allocate the PMU queue corresponding to the FW version */ ret = nvkm_msgqueue_new(img->ucode_desc.app_version, sec->falcon, @@ -153,7 +153,7 @@ acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, int maxver, if (ret) return ret; - return 0; + return ver; } int -- cgit v1.2.3 From ab4bec16d4bc21e7b500e519c90e82b063c0df15 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 6 Jun 2019 16:28:35 +1000 Subject: drm/nouveau/secboot/gp10[2467]: support newer FW to fix SEC2 failures on some boards Some newer boards with these chipsets aren't compatible with the prior version of the SEC2 FW, and fail to load as a result. This newer FW is actually the one we already use on >=GP108. Unfortunately, there are interface differences in GP108's FW, making it impossible to simply move files around in linux-firmware to solve this. We need to be able to keep compatibility with all linux-firmware/kernel combinations, which means supporting both firmwares. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c | 4 ++-- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.h | 3 +-- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c | 14 +++++++++++++- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.h | 1 + 5 files changed, 18 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c index 71f85b16ef34..f6b2d20d7fc3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c @@ -188,13 +188,13 @@ acr_r361_generate_sec2_bl_desc(const struct nvkm_acr *acr, desc->argv = 0x01000000; } -static const struct acr_r352_lsf_func +const struct acr_r352_lsf_func acr_r361_ls_sec2_func_0 = { .generate_bl_desc = acr_r361_generate_sec2_bl_desc, .bl_desc_size = sizeof(struct acr_r361_pmu_bl_desc), }; -const struct acr_r352_ls_func +static const struct acr_r352_ls_func acr_r361_ls_sec2_func = { .load = acr_ls_ucode_load_sec2, .post_run = acr_ls_sec2_post_run, diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.h b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.h index f9f978daadb9..38dec93779c8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.h @@ -67,6 +67,5 @@ void acr_r361_generate_hs_bl_desc(const struct hsf_load_header *, void *, u64); extern const struct acr_r352_ls_func acr_r361_ls_fecs_func; extern const struct acr_r352_ls_func acr_r361_ls_gpccs_func; extern const struct acr_r352_ls_func acr_r361_ls_pmu_func; -extern const struct acr_r352_ls_func acr_r361_ls_sec2_func; - +extern const struct acr_r352_lsf_func acr_r361_ls_sec2_func_0; #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c index fe20a0977ba6..472ced29da7e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r367.c @@ -22,6 +22,7 @@ #include "acr_r367.h" #include "acr_r361.h" +#include "acr_r370.h" #include @@ -381,6 +382,17 @@ acr_r367_fixup_hs_desc(struct acr_r352 *acr, struct nvkm_secboot *sb, } } +static const struct acr_r352_ls_func +acr_r367_ls_sec2_func = { + .load = acr_ls_ucode_load_sec2, + .post_run = acr_ls_sec2_post_run, + .version_max = 1, + .version = { + &acr_r361_ls_sec2_func_0, + &acr_r370_ls_sec2_func_0, + } +}; + const struct acr_r352_func acr_r367_func = { .fixup_hs_desc = acr_r367_fixup_hs_desc, @@ -394,7 +406,7 @@ acr_r367_func = { [NVKM_SECBOOT_FALCON_FECS] = &acr_r361_ls_fecs_func, [NVKM_SECBOOT_FALCON_GPCCS] = &acr_r361_ls_gpccs_func, [NVKM_SECBOOT_FALCON_PMU] = &acr_r361_ls_pmu_func, - [NVKM_SECBOOT_FALCON_SEC2] = &acr_r361_ls_sec2_func, + [NVKM_SECBOOT_FALCON_SEC2] = &acr_r367_ls_sec2_func, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c index ff52d40823a9..e821d0fd6217 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c @@ -111,7 +111,7 @@ acr_r370_generate_sec2_bl_desc(const struct nvkm_acr *acr, desc->argv = 0x01000000; } -static const struct acr_r352_lsf_func +const struct acr_r352_lsf_func acr_r370_ls_sec2_func_0 = { .generate_bl_desc = acr_r370_generate_sec2_bl_desc, .bl_desc_size = sizeof(struct acr_r370_flcn_bl_desc), diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.h b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.h index 3426f86a15e4..2efed6f995ad 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.h @@ -46,4 +46,5 @@ struct acr_r370_flcn_bl_desc { void acr_r370_generate_hs_bl_desc(const struct hsf_load_header *, void *, u64); extern const struct acr_r352_ls_func acr_r370_ls_fecs_func; extern const struct acr_r352_ls_func acr_r370_ls_gpccs_func; +extern const struct acr_r352_lsf_func acr_r370_ls_sec2_func_0; #endif -- cgit v1.2.3