From 448ac479768d6c242338ecf13569dc297f8908ce Mon Sep 17 00:00:00 2001 From: Sven Neumann Date: Thu, 22 Oct 2009 08:34:34 +0200 Subject: pxafb: use passed fb_var_screeninfo struct in pxafb_pan_display() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit pxafb_pan_display() used to ignore the fb_var_screeninfo parameter. Now pass it to setup_base_frame() instead of pulling default values out of fb_info. And the original patch has an issue of pxafb_pan_display() paying only attention to the 'var' parameter passed in, and Ville Syrjälä pointed out, this is potentially dangerous as user could pass in any other screeninfo parameters as well, and not only such that are relevant for display panning. This is fixed by limiting the arguments actually used to .xoffset, .yoffset and .vmode & FB_VMODE_YWRAP. Signed-off-by: Sven Neumann Cc: Ville Syrjälä Signed-off-by: Daniel Mack Signed-off-by: Eric Miao --- drivers/video/pxafb.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 1820c4a24434..33a6aacfcbe3 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -80,7 +80,8 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *); static void set_ctrlr_state(struct pxafb_info *fbi, u_int state); -static void setup_base_frame(struct pxafb_info *fbi, int branch); +static void setup_base_frame(struct pxafb_info *fbi, + struct fb_var_screeninfo *var, int branch); static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal, unsigned long offset, size_t size); @@ -531,12 +532,22 @@ static int pxafb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { struct pxafb_info *fbi = (struct pxafb_info *)info; + struct fb_var_screeninfo newvar; int dma = DMA_MAX + DMA_BASE; if (fbi->state != C_ENABLE) return 0; - setup_base_frame(fbi, 1); + /* Only take .xoffset, .yoffset and .vmode & FB_VMODE_YWRAP from what + * was passed in and copy the rest from the old screeninfo. + */ + memcpy(&newvar, &fbi->fb.var, sizeof(newvar)); + newvar.xoffset = var->xoffset; + newvar.yoffset = var->yoffset; + newvar.vmode &= ~FB_VMODE_YWRAP; + newvar.vmode |= var->vmode & FB_VMODE_YWRAP; + + setup_base_frame(fbi, &newvar, 1); if (fbi->lccr0 & LCCR0_SDS) lcd_writel(fbi, FBR1, fbi->fdadr[dma + 1] | 0x1); @@ -1052,9 +1063,10 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal, return 0; } -static void setup_base_frame(struct pxafb_info *fbi, int branch) +static void setup_base_frame(struct pxafb_info *fbi, + struct fb_var_screeninfo *var, + int branch) { - struct fb_var_screeninfo *var = &fbi->fb.var; struct fb_fix_screeninfo *fix = &fbi->fb.fix; int nbytes, dma, pal, bpp = var->bits_per_pixel; unsigned long offset; @@ -1332,7 +1344,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, #endif setup_parallel_timing(fbi, var); - setup_base_frame(fbi, 0); + setup_base_frame(fbi, var, 0); fbi->reg_lccr0 = fbi->lccr0 | (LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM | -- cgit v1.2.3 From 049ad833b1e52f6edeb675c744547167bf76ab2c Mon Sep 17 00:00:00 2001 From: Pieter Grimmerink Date: Fri, 13 Nov 2009 10:28:54 +0100 Subject: pxafb: add transparency field to pxafb_mode_info struct This allows to select either RGB565 (transparency 0) or RGBT555 (transparency 1) from the mode info Signed-off-by: Pieter Grimmerink Signed-off-by: Eric Miao --- arch/arm/mach-pxa/include/mach/pxafb.h | 3 ++- drivers/video/pxafb.c | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h index f73061c90b5e..160ec83f51a6 100644 --- a/arch/arm/mach-pxa/include/mach/pxafb.h +++ b/arch/arm/mach-pxa/include/mach/pxafb.h @@ -76,7 +76,8 @@ struct pxafb_mode_info { u_char bpp; u_int cmap_greyscale:1, depth:8, - unused:23; + transparency:1, + unused:22; /* Parallel Mode Timing */ u_char hsync_len; diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 33a6aacfcbe3..f58a3aae6ea6 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -398,6 +398,7 @@ static void pxafb_setmode(struct fb_var_screeninfo *var, var->lower_margin = mode->lower_margin; var->sync = mode->sync; var->grayscale = mode->cmap_greyscale; + var->transp.length = mode->transparency; /* set the initial RGBA bitfields */ pxafb_set_pixfmt(var, mode->depth); -- cgit v1.2.3 From a291ea217ca88dc6f0343f6bea9bb4a35bb08848 Mon Sep 17 00:00:00 2001 From: Jun Nie Date: Tue, 10 Nov 2009 09:33:49 +0800 Subject: pxa168fb: fix offset setting at initialization Signed-off-by: Jun Nie Signed-off-by: Eric Miao --- drivers/video/pxa168fb.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c index 84d8327e47db..75285d3f393c 100644 --- a/drivers/video/pxa168fb.c +++ b/drivers/video/pxa168fb.c @@ -687,6 +687,7 @@ static int __init pxa168fb_probe(struct platform_device *pdev) } info->fix.smem_start = (unsigned long)fbi->fb_start_dma; + set_graphics_start(info, 0, 0); /* * Set video mode according to platform data. -- cgit v1.2.3 From fa3f99384c20751c66962848807403ff171dc02f Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Mon, 31 Aug 2009 21:52:53 +0800 Subject: pxamci: introduce mmc_has_26mhz() and include pxa935 Along with more processor supporting 26MHz mode (including pxa935), introduce an individual macro mmc_has_26mhz() for this. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mmc/host/pxamci.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index b00d67319058..c85f6166056e 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c @@ -43,6 +43,9 @@ #define NR_SG 1 #define CLKRT_OFF (~0) +#define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \ + || cpu_is_pxa935()) + struct pxamci_host { struct mmc_host *mmc; spinlock_t lock; @@ -457,7 +460,7 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) clk_enable(host->clk); if (ios->clock == 26000000) { - /* to support 26MHz on pxa300/pxa310 */ + /* to support 26MHz */ host->clkrt = 7; } else { /* to handle (19.5MHz, 26MHz) */ @@ -608,8 +611,7 @@ static int pxamci_probe(struct platform_device *pdev) * Calculate minimum clock rate, rounding up. */ mmc->f_min = (host->clkrate + 63) / 64; - mmc->f_max = (cpu_is_pxa300() || cpu_is_pxa310()) ? 26000000 - : host->clkrate; + mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate; pxamci_init_ocr(host); @@ -618,7 +620,7 @@ static int pxamci_probe(struct platform_device *pdev) if (!cpu_is_pxa25x()) { mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; host->cmdat |= CMDAT_SDIO_INT_EN; - if (cpu_is_pxa300() || cpu_is_pxa310()) + if (mmc_has_26MHz()) mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; } -- cgit v1.2.3 From f64dcac0b1247842db2530959cbe3df1cb1947c4 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Tue, 24 Nov 2009 10:25:33 +0200 Subject: backlight: tdo24m: ensure chip select changes between transfers Some SPI host drivers do not change chip select betwen transfers unless .cs_chnage field is explicitly set. The LCD spec requires chip select change between consecuitive transfers, so ensure it at the SPI driver level. Signed-off-by: Mike Rapoport Signed-off-by: Eric Miao --- drivers/video/backlight/tdo24m.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/video/backlight/tdo24m.c b/drivers/video/backlight/tdo24m.c index bbfb502add67..4a3d46e08016 100644 --- a/drivers/video/backlight/tdo24m.c +++ b/drivers/video/backlight/tdo24m.c @@ -367,6 +367,7 @@ static int __devinit tdo24m_probe(struct spi_device *spi) spi_message_init(m); + x->cs_change = 1; x->tx_buf = &lcd->buf[0]; spi_message_add_tail(x, m); -- cgit v1.2.3 From b3a8549593696f5f3efcdbf280e2c8e0fe894855 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Thu, 5 Nov 2009 10:27:13 -0500 Subject: backlight: da903x_bl: control WLED output current in da9034 Update WLED output current source before changing brightness. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/video/backlight/da903x_bl.c | 7 +++++++ include/linux/mfd/da903x.h | 4 ++++ 2 files changed, 11 insertions(+) (limited to 'drivers') diff --git a/drivers/video/backlight/da903x_bl.c b/drivers/video/backlight/da903x_bl.c index 701a1081e199..7fcb0eb54c60 100644 --- a/drivers/video/backlight/da903x_bl.c +++ b/drivers/video/backlight/da903x_bl.c @@ -25,6 +25,7 @@ #define DA9034_WLED_CONTROL1 0x3C #define DA9034_WLED_CONTROL2 0x3D +#define DA9034_WLED_ISET(x) ((x) & 0x1f) #define DA9034_WLED_BOOST_EN (1 << 5) @@ -101,6 +102,7 @@ static struct backlight_ops da903x_backlight_ops = { static int da903x_backlight_probe(struct platform_device *pdev) { + struct da9034_backlight_pdata *pdata = pdev->dev.platform_data; struct da903x_backlight_data *data; struct backlight_device *bl; int max_brightness; @@ -127,6 +129,11 @@ static int da903x_backlight_probe(struct platform_device *pdev) data->da903x_dev = pdev->dev.parent; data->current_brightness = 0; + /* adjust the WLED output current */ + if (pdata) + da903x_write(data->da903x_dev, DA9034_WLED_CONTROL2, + DA9034_WLED_ISET(pdata->output_current)); + bl = backlight_device_register(pdev->name, data->da903x_dev, data, &da903x_backlight_ops); if (IS_ERR(bl)) { diff --git a/include/linux/mfd/da903x.h b/include/linux/mfd/da903x.h index c63b65c94429..0aa3a1a49ee3 100644 --- a/include/linux/mfd/da903x.h +++ b/include/linux/mfd/da903x.h @@ -96,6 +96,10 @@ struct da9034_touch_pdata { int y_inverted; }; +struct da9034_backlight_pdata { + int output_current; /* output current of WLED, from 0-31 (in mA) */ +}; + /* DA9030 battery charger data */ struct power_supply_info; -- cgit v1.2.3 From a88bdbb54a9352b916877bfc5e316c44ec1b2d8f Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Fri, 11 Sep 2009 19:33:58 +0800 Subject: pxa3xx_nand: fix memory out of bound When fetch nand data with non-DMA mode, we should align info->data_size to 32bit, not 8bit. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mtd/nand/pxa3xx_nand.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 6ea520ae2410..f463ad272d3b 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -9,6 +9,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include @@ -489,7 +490,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info) switch (info->state) { case STATE_PIO_WRITING: __raw_writesl(info->mmio_base + NDDB, info->data_buff, - info->data_size << 2); + DIV_ROUND_UP(info->data_size, 4)); enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD); @@ -501,7 +502,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info) break; case STATE_PIO_READING: __raw_readsl(info->mmio_base + NDDB, info->data_buff, - info->data_size << 2); + DIV_ROUND_UP(info->data_size, 4)); break; default: printk(KERN_ERR "%s: invalid state %d\n", __func__, -- cgit v1.2.3 From 7ce33aff68f653769ba16108834ed212788bcbb6 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Mon, 14 Sep 2009 20:21:01 +0800 Subject: pxa3xx_nand: reset read buffer before reading Initialize the read buffer content to 0xFF. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mtd/nand/pxa3xx_nand.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index f463ad272d3b..9140fdc42bca 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -670,6 +670,7 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command, /* disable HW ECC to get all the OOB data */ info->buf_count = mtd->writesize + mtd->oobsize; info->buf_start = mtd->writesize + column; + memset(info->data_buff, 0xFF, info->buf_count); if (prepare_read_prog_cmd(info, cmdset->read1, column, page_addr)) break; -- cgit v1.2.3 From 726de6e16d88986db3102ebe6ae277f73df63eaf Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Wed, 14 Oct 2009 15:47:01 +0800 Subject: pxa3xx_nand: adjust timing of Micron NAND flash Slow down the tRp of Micron NAND flash timing. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mtd/nand/pxa3xx_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 9140fdc42bca..a085cd0a6e5e 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -235,7 +235,7 @@ static struct pxa3xx_nand_timing micron_timing = { .tWH = 15, .tWP = 25, .tRH = 15, - .tRP = 25, + .tRP = 30, .tR = 25000, .tWHR = 60, .tAR = 10, -- cgit v1.2.3 From 8638fac849c181176324f26b4b82e3b96f378dde Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Thu, 10 Sep 2009 14:11:44 +0800 Subject: pxa3xx_nand: remove hardcode register address Although nand controller is same between PXA3xx and MMP, the register space is different. Remove the hardcode register address setting in pxa3xx_nand.h. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mtd/nand/pxa3xx_nand.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index a085cd0a6e5e..3b4bc54df695 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -85,10 +85,6 @@ #define NDCB0_CMD1_MASK (0xff) #define NDCB0_ADDR_CYC_SHIFT (16) -/* dma-able I/O address for the NAND data and commands */ -#define NDCB0_DMA_ADDR (0x43100048) -#define NDDB_DMA_ADDR (0x43100040) - /* macros for registers read/write */ #define nand_writel(info, off, val) \ __raw_writel((val), (info)->mmio_base + (off)) @@ -124,6 +120,7 @@ struct pxa3xx_nand_info { struct clk *clk; void __iomem *mmio_base; + unsigned long mmio_phys; unsigned int buf_start; unsigned int buf_count; @@ -524,11 +521,11 @@ static void start_data_dma(struct pxa3xx_nand_info *info, int dir_out) if (dir_out) { desc->dsadr = info->data_buff_phys; - desc->dtadr = NDDB_DMA_ADDR; + desc->dtadr = info->mmio_phys + NDDB; desc->dcmd |= DCMD_INCSRCADDR | DCMD_FLOWTRG; } else { desc->dtadr = info->data_buff_phys; - desc->dsadr = NDDB_DMA_ADDR; + desc->dsadr = info->mmio_phys + NDDB; desc->dcmd |= DCMD_INCTRGADDR | DCMD_FLOWSRC; } @@ -1241,6 +1238,7 @@ static int pxa3xx_nand_probe(struct platform_device *pdev) ret = -ENODEV; goto fail_free_res; } + info->mmio_phys = r->start; ret = pxa3xx_nand_init_buff(info); if (ret) -- cgit v1.2.3 From dbf5986aed62620d3dde54e1b63889821c857675 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Thu, 10 Sep 2009 14:22:55 +0800 Subject: pxa3xx_nand: remove hardcode irq number Nand driver uses IRQ_NAND as hardcode irq number. In ARCH_MMP, the irq number is different. So get irq resource from platform device structure and use it in initialization and deinitialization code. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mtd/nand/pxa3xx_nand.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 3b4bc54df695..e75b1bf6df12 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -1244,8 +1244,8 @@ static int pxa3xx_nand_probe(struct platform_device *pdev) if (ret) goto fail_free_io; - ret = request_irq(IRQ_NAND, pxa3xx_nand_irq, IRQF_DISABLED, - pdev->name, info); + ret = request_irq(irq, pxa3xx_nand_irq, IRQF_DISABLED, + pdev->name, info); if (ret < 0) { dev_err(&pdev->dev, "failed to request IRQ\n"); goto fail_free_buf; @@ -1271,7 +1271,7 @@ static int pxa3xx_nand_probe(struct platform_device *pdev) return add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts); fail_free_irq: - free_irq(IRQ_NAND, info); + free_irq(irq, info); fail_free_buf: if (use_dma) { pxa_free_dma(info->data_dma_ch); @@ -1296,12 +1296,15 @@ static int pxa3xx_nand_remove(struct platform_device *pdev) struct mtd_info *mtd = platform_get_drvdata(pdev); struct pxa3xx_nand_info *info = mtd->priv; struct resource *r; + int irq; platform_set_drvdata(pdev, NULL); del_mtd_device(mtd); del_mtd_partitions(mtd); - free_irq(IRQ_NAND, info); + irq = platform_get_irq(pdev, 0); + if (irq >= 0) + free_irq(irq, info); if (use_dma) { pxa_free_dma(info->data_dma_ch); dma_free_writecombine(&pdev->dev, info->data_buff_size, -- cgit v1.2.3 From 346e125967c39fc25263f3071dfc88224ae843f4 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Thu, 10 Sep 2009 14:27:23 +0800 Subject: pxa3xx_nand: disable nand irq in initialization In some bootloader, IRQ is enabled. Writing nand triggers unexpected interrupts. So disable nand irq in initialization. After nand initialized and in working state, irq is controlled by nand driver. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mtd/nand/pxa3xx_nand.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index e75b1bf6df12..11f32454fc77 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -1244,6 +1244,9 @@ static int pxa3xx_nand_probe(struct platform_device *pdev) if (ret) goto fail_free_io; + /* initialize all interrupts to be disabled */ + disable_int(info, NDSR_MASK); + ret = request_irq(irq, pxa3xx_nand_irq, IRQF_DISABLED, pdev->name, info); if (ret < 0) { -- cgit v1.2.3 From d3490dfdbc453a16bc7f3cff731c9f7851735ab3 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Thu, 10 Sep 2009 14:33:30 +0800 Subject: pxa3xx_nand: add new nand chip support Support samsung 2GbX8 and 32GbX8 nand flash. Support micron 4GbX8 and 4GbX16 nand flash. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mtd/nand/pxa3xx_nand.c | 48 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 11f32454fc77..7f97d57e8a5e 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -226,6 +226,28 @@ static struct pxa3xx_nand_flash samsung512MbX16 = { .chip_id = 0x46ec, }; +static struct pxa3xx_nand_flash samsung2GbX8 = { + .timing = &samsung512MbX16_timing, + .cmdset = &smallpage_cmdset, + .page_per_block = 64, + .page_size = 2048, + .flash_width = 8, + .dfc_width = 8, + .num_blocks = 2048, + .chip_id = 0xdaec, +}; + +static struct pxa3xx_nand_flash samsung32GbX8 = { + .timing = &samsung512MbX16_timing, + .cmdset = &smallpage_cmdset, + .page_per_block = 128, + .page_size = 4096, + .flash_width = 8, + .dfc_width = 8, + .num_blocks = 8192, + .chip_id = 0xd7ec, +}; + static struct pxa3xx_nand_timing micron_timing = { .tCH = 10, .tCS = 25, @@ -260,6 +282,28 @@ static struct pxa3xx_nand_flash micron1GbX16 = { .chip_id = 0xb12c, }; +static struct pxa3xx_nand_flash micron4GbX8 = { + .timing = µn_timing, + .cmdset = &largepage_cmdset, + .page_per_block = 64, + .page_size = 2048, + .flash_width = 8, + .dfc_width = 8, + .num_blocks = 4096, + .chip_id = 0xdc2c, +}; + +static struct pxa3xx_nand_flash micron4GbX16 = { + .timing = µn_timing, + .cmdset = &largepage_cmdset, + .page_per_block = 64, + .page_size = 2048, + .flash_width = 16, + .dfc_width = 16, + .num_blocks = 4096, + .chip_id = 0xcc2c, +}; + static struct pxa3xx_nand_timing stm2GbX16_timing = { .tCH = 10, .tCS = 35, @@ -285,8 +329,12 @@ static struct pxa3xx_nand_flash stm2GbX16 = { static struct pxa3xx_nand_flash *builtin_flash_types[] = { &samsung512MbX16, + &samsung2GbX8, + &samsung32GbX8, µn1GbX8, µn1GbX16, + µn4GbX8, + µn4GbX16, &stm2GbX16, }; #endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */ -- cgit v1.2.3 From 171d0fbee2b80cd21ff590449a05a48c1dc917b8 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Thu, 10 Sep 2009 13:49:45 +0800 Subject: pxa3xx_nand: update dependancy to support ARCH_MMP MTD_NAND_PXA3xx module is shared between ARCH_PXA and ARCH_MMP. Update this configuration according to it. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- drivers/mtd/nand/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 2fda0b615246..8f8e87b7ed64 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -358,7 +358,7 @@ endchoice config MTD_NAND_PXA3xx tristate "Support for NAND flash devices on PXA3xx" - depends on MTD_NAND && PXA3xx + depends on MTD_NAND && (PXA3xx || ARCH_MMP) help This enables the driver for the NAND flash device found on PXA3xx processors -- cgit v1.2.3 From 82b95ecb96122896fd5b7b75001fdda3e047ef38 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Thu, 10 Sep 2009 13:55:23 +0800 Subject: pxa3xx_nand: move pxa3xx_nand.h common into plat directory Since the same nand controller is shared between ARCH_PXA and ARCH_MMP. Move the pxa3xx_nand.h from mach directory to plat directoy. Signed-off-by: Haojian Zhuang Cc: David Woodhouse Signed-off-by: Eric Miao --- arch/arm/mach-pxa/cm-x300.c | 2 +- arch/arm/mach-pxa/colibri-pxa3xx.c | 2 +- arch/arm/mach-pxa/devices.c | 4 +- arch/arm/mach-pxa/include/mach/pxa3xx_nand.h | 63 ---------------------------- arch/arm/mach-pxa/littleton.c | 4 +- arch/arm/mach-pxa/zylonite.c | 2 +- arch/arm/plat-pxa/include/plat/pxa3xx_nand.h | 63 ++++++++++++++++++++++++++++ drivers/mtd/nand/pxa3xx_nand.c | 2 +- 8 files changed, 71 insertions(+), 71 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/pxa3xx_nand.h create mode 100644 arch/arm/plat-pxa/include/plat/pxa3xx_nand.h (limited to 'drivers') diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 102916f1e465..06552ca91814 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -35,7 +35,7 @@ #include #include #include -#include +#include #include diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c index efebaf4d734d..e6c0a2287eb8 100644 --- a/arch/arm/mach-pxa/colibri-pxa3xx.c +++ b/arch/arm/mach-pxa/colibri-pxa3xx.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 46fabe1cca11..e2b427fa55e5 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -8,13 +8,13 @@ #include #include #include -#include #include #include #include #include #include -#include +#include +#include #include "devices.h" #include "generic.h" diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h b/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h deleted file mode 100644 index 3478eae32d8a..000000000000 --- a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h +++ /dev/null @@ -1,63 +0,0 @@ -#ifndef __ASM_ARCH_PXA3XX_NAND_H -#define __ASM_ARCH_PXA3XX_NAND_H - -#include -#include - -struct pxa3xx_nand_timing { - unsigned int tCH; /* Enable signal hold time */ - unsigned int tCS; /* Enable signal setup time */ - unsigned int tWH; /* ND_nWE high duration */ - unsigned int tWP; /* ND_nWE pulse time */ - unsigned int tRH; /* ND_nRE high duration */ - unsigned int tRP; /* ND_nRE pulse width */ - unsigned int tR; /* ND_nWE high to ND_nRE low for read */ - unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */ - unsigned int tAR; /* ND_ALE low to ND_nRE low delay */ -}; - -struct pxa3xx_nand_cmdset { - uint16_t read1; - uint16_t read2; - uint16_t program; - uint16_t read_status; - uint16_t read_id; - uint16_t erase; - uint16_t reset; - uint16_t lock; - uint16_t unlock; - uint16_t lock_status; -}; - -struct pxa3xx_nand_flash { - const struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ - const struct pxa3xx_nand_cmdset *cmdset; - - uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */ - uint32_t page_size; /* Page size in bytes (PAGE_SZ) */ - uint32_t flash_width; /* Width of Flash memory (DWIDTH_M) */ - uint32_t dfc_width; /* Width of flash controller(DWIDTH_C) */ - uint32_t num_blocks; /* Number of physical blocks in Flash */ - uint32_t chip_id; -}; - -struct pxa3xx_nand_platform_data { - - /* the data flash bus is shared between the Static Memory - * Controller and the Data Flash Controller, the arbiter - * controls the ownership of the bus - */ - int enable_arbiter; - - /* allow platform code to keep OBM/bootloader defined NFC config */ - int keep_config; - - const struct mtd_partition *parts; - unsigned int nr_parts; - - const struct pxa3xx_nand_flash * flash; - size_t num_flash; -}; - -extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); -#endif /* __ASM_ARCH_PXA3XX_NAND_H */ diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index 13848955d133..ce5e6175a050 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -44,10 +44,10 @@ #include #include #include -#include #include -#include #include +#include +#include #include "generic.h" diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 09784d3954e4..8fcb69411cf7 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include #include "devices.h" #include "generic.h" diff --git a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h new file mode 100644 index 000000000000..3478eae32d8a --- /dev/null +++ b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h @@ -0,0 +1,63 @@ +#ifndef __ASM_ARCH_PXA3XX_NAND_H +#define __ASM_ARCH_PXA3XX_NAND_H + +#include +#include + +struct pxa3xx_nand_timing { + unsigned int tCH; /* Enable signal hold time */ + unsigned int tCS; /* Enable signal setup time */ + unsigned int tWH; /* ND_nWE high duration */ + unsigned int tWP; /* ND_nWE pulse time */ + unsigned int tRH; /* ND_nRE high duration */ + unsigned int tRP; /* ND_nRE pulse width */ + unsigned int tR; /* ND_nWE high to ND_nRE low for read */ + unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */ + unsigned int tAR; /* ND_ALE low to ND_nRE low delay */ +}; + +struct pxa3xx_nand_cmdset { + uint16_t read1; + uint16_t read2; + uint16_t program; + uint16_t read_status; + uint16_t read_id; + uint16_t erase; + uint16_t reset; + uint16_t lock; + uint16_t unlock; + uint16_t lock_status; +}; + +struct pxa3xx_nand_flash { + const struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ + const struct pxa3xx_nand_cmdset *cmdset; + + uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */ + uint32_t page_size; /* Page size in bytes (PAGE_SZ) */ + uint32_t flash_width; /* Width of Flash memory (DWIDTH_M) */ + uint32_t dfc_width; /* Width of flash controller(DWIDTH_C) */ + uint32_t num_blocks; /* Number of physical blocks in Flash */ + uint32_t chip_id; +}; + +struct pxa3xx_nand_platform_data { + + /* the data flash bus is shared between the Static Memory + * Controller and the Data Flash Controller, the arbiter + * controls the ownership of the bus + */ + int enable_arbiter; + + /* allow platform code to keep OBM/bootloader defined NFC config */ + int keep_config; + + const struct mtd_partition *parts; + unsigned int nr_parts; + + const struct pxa3xx_nand_flash * flash; + size_t num_flash; +}; + +extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); +#endif /* __ASM_ARCH_PXA3XX_NAND_H */ diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 7f97d57e8a5e..1a5a0365c983 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -23,7 +23,7 @@ #include #include -#include +#include #define CHIP_DELAY_TIMEOUT (2 * HZ/10) -- cgit v1.2.3