From 6a82ba6d4fda21e5f9fda0f4126add3b88522f02 Mon Sep 17 00:00:00 2001 From: Kristen Carlson Accardi Date: Fri, 10 Apr 2015 11:06:43 -0700 Subject: intel_pstate: Change the setpoint for Atom params Change the setpoint for the Baytrail and Cherrytrail CPUs. This will cause more aggressive pstate selection and improves performance on a variety of workloads with little power penalty. Signed-off-by: Kristen Carlson Accardi Signed-off-by: Rafael J. Wysocki --- drivers/cpufreq/intel_pstate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index c5b81beccc8e..858a4515af9e 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -649,7 +649,7 @@ static struct cpu_defaults byt_params = { .pid_policy = { .sample_rate_ms = 10, .deadband = 0, - .setpoint = 97, + .setpoint = 60, .p_gain_pct = 14, .d_gain_pct = 0, .i_gain_pct = 4, -- cgit v1.2.3 From 64df1fdfccc054a4e5480c6bc965b67d3c83c3ae Mon Sep 17 00:00:00 2001 From: Borislav Petkov Date: Fri, 3 Apr 2015 15:19:53 +0200 Subject: cpufreq: intel_pstate: Fix an annoying !CONFIG_SMP warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I keep seeing drivers/cpufreq/intel_pstate.c: In function ‘intel_pstate_init’: drivers/cpufreq/intel_pstate.c:1187:26: warning: initialization from incompatible pointer type struct cpuinfo_x86 *c = &boot_cpu_data; when doing randconfig builds. This is caused by the fact that when !CONFIG_SMP, asm/processor.h defines cpu_info to boot_cpu_data and the local variable struct cpu_defaults *cpu_info overshadows it leading to this unfortunate assignment in the preprocessed source: struct cpu_defaults *boot_cpu_data; struct cpuinfo_x86 *c = &boot_cpu_data; Rename the local variable and use static_cpu_has_safe() which alleviates the need for defining a local cpuinfo_x86 pointer. Signed-off-by: Borislav Petkov Acked-by: Kristen Carlson Accardi Signed-off-by: Rafael J. Wysocki --- drivers/cpufreq/intel_pstate.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index 858a4515af9e..6414661ac1c4 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -31,6 +31,7 @@ #include #include #include +#include #define BYT_RATIOS 0x66a #define BYT_VIDS 0x66b @@ -1200,8 +1201,7 @@ static int __init intel_pstate_init(void) { int cpu, rc = 0; const struct x86_cpu_id *id; - struct cpu_defaults *cpu_info; - struct cpuinfo_x86 *c = &boot_cpu_data; + struct cpu_defaults *cpu_def; if (no_load) return -ENODEV; @@ -1217,10 +1217,10 @@ static int __init intel_pstate_init(void) if (intel_pstate_platform_pwr_mgmt_exists()) return -ENODEV; - cpu_info = (struct cpu_defaults *)id->driver_data; + cpu_def = (struct cpu_defaults *)id->driver_data; - copy_pid_params(&cpu_info->pid_policy); - copy_cpu_funcs(&cpu_info->funcs); + copy_pid_params(&cpu_def->pid_policy); + copy_cpu_funcs(&cpu_def->funcs); if (intel_pstate_msrs_not_valid()) return -ENODEV; @@ -1231,7 +1231,7 @@ static int __init intel_pstate_init(void) if (!all_cpu_data) return -ENOMEM; - if (cpu_has(c,X86_FEATURE_HWP) && !no_hwp) + if (static_cpu_has_safe(X86_FEATURE_HWP) && !no_hwp) intel_pstate_hwp_enable(); if (!hwp_active && hwp_only) -- cgit v1.2.3 From 5fa0fa4b01cd9c52c4be0ff69ce0d922cd724812 Mon Sep 17 00:00:00 2001 From: Brian Bian Date: Tue, 14 Apr 2015 10:53:35 -0700 Subject: powercap / RAPL: Add support for Intel Skylake processors Signed-off-by: Brian Bian Acked-by: Jacob Pan Signed-off-by: Rafael J. Wysocki --- drivers/powercap/intel_rapl.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c index e03877c4b195..fd243231620a 100644 --- a/drivers/powercap/intel_rapl.c +++ b/drivers/powercap/intel_rapl.c @@ -1064,6 +1064,7 @@ static const struct x86_cpu_id rapl_ids[] __initconst = { RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */ RAPL_CPU(0x4f, rapl_defaults_hsw_server),/* Broadwell servers */ RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */ + RAPL_CPU(0x4E, rapl_defaults_core),/* Skylake */ RAPL_CPU(0x4C, rapl_defaults_atom),/* Braswell */ RAPL_CPU(0x4A, rapl_defaults_atom),/* Tangier */ RAPL_CPU(0x56, rapl_defaults_core),/* Future Xeon */ -- cgit v1.2.3