From 1c4b5ecb7ea190fa3e9f9d6891e6c90b60e04f24 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Wed, 23 Feb 2022 08:47:20 +0100 Subject: remove the h8300 architecture Signed-off-by: Christoph Hellwig --- drivers/clk/Makefile | 1 - drivers/clk/h8300/Makefile | 3 - drivers/clk/h8300/clk-div.c | 57 ---------- drivers/clk/h8300/clk-h8s2678.c | 145 ------------------------ drivers/clocksource/Kconfig | 20 ---- drivers/clocksource/Makefile | 3 - drivers/clocksource/h8300_timer16.c | 192 ------------------------------- drivers/clocksource/h8300_timer8.c | 211 ----------------------------------- drivers/clocksource/h8300_tpu.c | 158 -------------------------- drivers/irqchip/Kconfig | 11 -- drivers/irqchip/Makefile | 2 - drivers/irqchip/irq-renesas-h8300h.c | 94 ---------------- drivers/irqchip/irq-renesas-h8s.c | 102 ----------------- drivers/net/ethernet/smsc/Kconfig | 4 +- drivers/net/ethernet/smsc/smc91x.h | 11 -- drivers/tty/serial/Kconfig | 5 +- 16 files changed, 4 insertions(+), 1015 deletions(-) delete mode 100644 drivers/clk/h8300/Makefile delete mode 100644 drivers/clk/h8300/clk-div.c delete mode 100644 drivers/clk/h8300/clk-h8s2678.c delete mode 100644 drivers/clocksource/h8300_timer16.c delete mode 100644 drivers/clocksource/h8300_timer8.c delete mode 100644 drivers/clocksource/h8300_tpu.c delete mode 100644 drivers/irqchip/irq-renesas-h8300h.c delete mode 100644 drivers/irqchip/irq-renesas-h8s.c (limited to 'drivers') diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 16e588630472..955fbce86843 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -81,7 +81,6 @@ obj-$(CONFIG_CLK_BAIKAL_T1) += baikal-t1/ obj-y += bcm/ obj-$(CONFIG_ARCH_BERLIN) += berlin/ obj-$(CONFIG_ARCH_DAVINCI) += davinci/ -obj-$(CONFIG_H8300) += h8300/ obj-$(CONFIG_ARCH_HISI) += hisilicon/ obj-y += imgtec/ obj-y += imx/ diff --git a/drivers/clk/h8300/Makefile b/drivers/clk/h8300/Makefile deleted file mode 100644 index 8078a0b79000..000000000000 --- a/drivers/clk/h8300/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -obj-y += clk-div.o -obj-$(CONFIG_H8S2678) += clk-h8s2678.o diff --git a/drivers/clk/h8300/clk-div.c b/drivers/clk/h8300/clk-div.c deleted file mode 100644 index 376be03bb546..000000000000 --- a/drivers/clk/h8300/clk-div.c +++ /dev/null @@ -1,57 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * H8/300 divide clock driver - * - * Copyright 2015 Yoshinori Sato - */ - -#include -#include -#include -#include -#include - -static DEFINE_SPINLOCK(clklock); - -static void __init h8300_div_clk_setup(struct device_node *node) -{ - unsigned int num_parents; - struct clk_hw *hw; - const char *clk_name = node->name; - const char *parent_name; - void __iomem *divcr = NULL; - int width; - int offset; - - num_parents = of_clk_get_parent_count(node); - if (!num_parents) { - pr_err("%s: no parent found\n", clk_name); - return; - } - - divcr = of_iomap(node, 0); - if (divcr == NULL) { - pr_err("%s: failed to map divide register\n", clk_name); - goto error; - } - offset = (unsigned long)divcr & 3; - offset = (3 - offset) * 8; - divcr = (void __iomem *)((unsigned long)divcr & ~3); - - parent_name = of_clk_get_parent_name(node, 0); - of_property_read_u32(node, "renesas,width", &width); - hw = clk_hw_register_divider(NULL, clk_name, parent_name, - CLK_SET_RATE_GATE, divcr, offset, width, - CLK_DIVIDER_POWER_OF_TWO, &clklock); - if (!IS_ERR(hw)) { - of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw); - return; - } - pr_err("%s: failed to register %s div clock (%ld)\n", - __func__, clk_name, PTR_ERR(hw)); -error: - if (divcr) - iounmap(divcr); -} - -CLK_OF_DECLARE(h8300_div_clk, "renesas,h8300-div-clock", h8300_div_clk_setup); diff --git a/drivers/clk/h8300/clk-h8s2678.c b/drivers/clk/h8300/clk-h8s2678.c deleted file mode 100644 index 67c495b67c18..000000000000 --- a/drivers/clk/h8300/clk-h8s2678.c +++ /dev/null @@ -1,145 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * H8S2678 clock driver - * - * Copyright 2015 Yoshinori Sato - */ - -#include -#include -#include -#include -#include -#include - -static DEFINE_SPINLOCK(clklock); - -#define MAX_FREQ 33333333 -#define MIN_FREQ 8000000 - -struct pll_clock { - struct clk_hw hw; - void __iomem *sckcr; - void __iomem *pllcr; -}; - -#define to_pll_clock(_hw) container_of(_hw, struct pll_clock, hw) - -static unsigned long pll_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct pll_clock *pll_clock = to_pll_clock(hw); - int mul = 1 << (readb(pll_clock->pllcr) & 3); - - return parent_rate * mul; -} - -static long pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) -{ - int i, m = -1; - long offset[3]; - - if (rate > MAX_FREQ) - rate = MAX_FREQ; - if (rate < MIN_FREQ) - rate = MIN_FREQ; - - for (i = 0; i < 3; i++) - offset[i] = abs(rate - (*prate * (1 << i))); - for (i = 0; i < 3; i++) - if (m < 0) - m = i; - else - m = (offset[i] < offset[m])?i:m; - - return *prate * (1 << m); -} - -static int pll_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - int pll; - unsigned char val; - unsigned long flags; - struct pll_clock *pll_clock = to_pll_clock(hw); - - pll = ((rate / parent_rate) / 2) & 0x03; - spin_lock_irqsave(&clklock, flags); - val = readb(pll_clock->sckcr); - val |= 0x08; - writeb(val, pll_clock->sckcr); - val = readb(pll_clock->pllcr); - val &= ~0x03; - val |= pll; - writeb(val, pll_clock->pllcr); - spin_unlock_irqrestore(&clklock, flags); - return 0; -} - -static const struct clk_ops pll_ops = { - .recalc_rate = pll_recalc_rate, - .round_rate = pll_round_rate, - .set_rate = pll_set_rate, -}; - -static void __init h8s2678_pll_clk_setup(struct device_node *node) -{ - unsigned int num_parents; - const char *clk_name = node->name; - const char *parent_name; - struct pll_clock *pll_clock; - struct clk_init_data init; - int ret; - - num_parents = of_clk_get_parent_count(node); - if (!num_parents) { - pr_err("%s: no parent found\n", clk_name); - return; - } - - - pll_clock = kzalloc(sizeof(*pll_clock), GFP_KERNEL); - if (!pll_clock) - return; - - pll_clock->sckcr = of_iomap(node, 0); - if (pll_clock->sckcr == NULL) { - pr_err("%s: failed to map divide register\n", clk_name); - goto free_clock; - } - - pll_clock->pllcr = of_iomap(node, 1); - if (pll_clock->pllcr == NULL) { - pr_err("%s: failed to map multiply register\n", clk_name); - goto unmap_sckcr; - } - - parent_name = of_clk_get_parent_name(node, 0); - init.name = clk_name; - init.ops = &pll_ops; - init.flags = 0; - init.parent_names = &parent_name; - init.num_parents = 1; - pll_clock->hw.init = &init; - - ret = clk_hw_register(NULL, &pll_clock->hw); - if (ret) { - pr_err("%s: failed to register %s div clock (%d)\n", - __func__, clk_name, ret); - goto unmap_pllcr; - } - - of_clk_add_hw_provider(node, of_clk_hw_simple_get, &pll_clock->hw); - return; - -unmap_pllcr: - iounmap(pll_clock->pllcr); -unmap_sckcr: - iounmap(pll_clock->sckcr); -free_clock: - kfree(pll_clock); -} - -CLK_OF_DECLARE(h8s2678_div_clk, "renesas,h8s2678-pll-clock", - h8s2678_pll_clk_setup); diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index cfb8ea0df3b1..4aa0883b3534 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -567,26 +567,6 @@ config CLKSRC_PXA This enables OST0 support available on PXA and SA-11x0 platforms. -config H8300_TMR8 - bool "Clockevent timer for the H8300 platform" if COMPILE_TEST - depends on HAS_IOMEM - help - This enables the 8 bits timer for the H8300 platform. - -config H8300_TMR16 - bool "Clockevent timer for the H83069 platform" if COMPILE_TEST - depends on HAS_IOMEM - help - This enables the 16 bits timer for the H8300 platform with the - H83069 CPU. - -config H8300_TPU - bool "Clocksource for the H8300 platform" if COMPILE_TEST - depends on HAS_IOMEM - help - This enables the clocksource for the H8300 platform with the - H8S2678 CPU. - config CLKSRC_IMX_GPT bool "Clocksource using i.MX GPT" if COMPILE_TEST depends on (ARM || ARM64) && HAVE_CLK diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index fa5f624eadb6..8e81eadfbeeb 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -73,9 +73,6 @@ obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o obj-$(CONFIG_CLKSRC_IMX_TPM) += timer-imx-tpm.o obj-$(CONFIG_TIMER_IMX_SYS_CTR) += timer-imx-sysctr.o obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o -obj-$(CONFIG_H8300_TMR8) += h8300_timer8.o -obj-$(CONFIG_H8300_TMR16) += h8300_timer16.o -obj-$(CONFIG_H8300_TPU) += h8300_tpu.o obj-$(CONFIG_INGENIC_OST) += ingenic-ost.o obj-$(CONFIG_INGENIC_SYSOST) += ingenic-sysost.o obj-$(CONFIG_INGENIC_TIMER) += ingenic-timer.o diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c deleted file mode 100644 index 86ca91451b2e..000000000000 --- a/drivers/clocksource/h8300_timer16.c +++ /dev/null @@ -1,192 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * H8/300 16bit Timer driver - * - * Copyright 2015 Yoshinori Sato - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define TSTR 0 -#define TISRC 6 - -#define TCR 0 -#define TCNT 2 - -#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a)) -#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a)) - -struct timer16_priv { - struct clocksource cs; - unsigned long total_cycles; - void __iomem *mapbase; - void __iomem *mapcommon; - unsigned short cs_enabled; - unsigned char enb; - unsigned char ovf; - unsigned char ovie; -}; - -static unsigned long timer16_get_counter(struct timer16_priv *p) -{ - unsigned short v1, v2, v3; - unsigned char o1, o2; - - o1 = ioread8(p->mapcommon + TISRC) & p->ovf; - - /* Make sure the timer value is stable. Stolen from acpi_pm.c */ - do { - o2 = o1; - v1 = ioread16be(p->mapbase + TCNT); - v2 = ioread16be(p->mapbase + TCNT); - v3 = ioread16be(p->mapbase + TCNT); - o1 = ioread8(p->mapcommon + TISRC) & p->ovf; - } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) - || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); - - if (likely(!o1)) - return v2; - else - return v2 + 0x10000; -} - - -static irqreturn_t timer16_interrupt(int irq, void *dev_id) -{ - struct timer16_priv *p = (struct timer16_priv *)dev_id; - - bclr(p->ovf, p->mapcommon + TISRC); - p->total_cycles += 0x10000; - - return IRQ_HANDLED; -} - -static inline struct timer16_priv *cs_to_priv(struct clocksource *cs) -{ - return container_of(cs, struct timer16_priv, cs); -} - -static u64 timer16_clocksource_read(struct clocksource *cs) -{ - struct timer16_priv *p = cs_to_priv(cs); - unsigned long raw, value; - - value = p->total_cycles; - raw = timer16_get_counter(p); - - return value + raw; -} - -static int timer16_enable(struct clocksource *cs) -{ - struct timer16_priv *p = cs_to_priv(cs); - - WARN_ON(p->cs_enabled); - - p->total_cycles = 0; - iowrite16be(0x0000, p->mapbase + TCNT); - iowrite8(0x83, p->mapbase + TCR); - bset(p->ovie, p->mapcommon + TISRC); - bset(p->enb, p->mapcommon + TSTR); - - p->cs_enabled = true; - return 0; -} - -static void timer16_disable(struct clocksource *cs) -{ - struct timer16_priv *p = cs_to_priv(cs); - - WARN_ON(!p->cs_enabled); - - bclr(p->ovie, p->mapcommon + TISRC); - bclr(p->enb, p->mapcommon + TSTR); - - p->cs_enabled = false; -} - -static struct timer16_priv timer16_priv = { - .cs = { - .name = "h8300_16timer", - .rating = 200, - .read = timer16_clocksource_read, - .enable = timer16_enable, - .disable = timer16_disable, - .mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, - }, -}; - -#define REG_CH 0 -#define REG_COMM 1 - -static int __init h8300_16timer_init(struct device_node *node) -{ - void __iomem *base[2]; - int ret, irq; - unsigned int ch; - struct clk *clk; - - clk = of_clk_get(node, 0); - if (IS_ERR(clk)) { - pr_err("failed to get clock for clocksource\n"); - return PTR_ERR(clk); - } - - ret = -ENXIO; - base[REG_CH] = of_iomap(node, 0); - if (!base[REG_CH]) { - pr_err("failed to map registers for clocksource\n"); - goto free_clk; - } - - base[REG_COMM] = of_iomap(node, 1); - if (!base[REG_COMM]) { - pr_err("failed to map registers for clocksource\n"); - goto unmap_ch; - } - - ret = -EINVAL; - irq = irq_of_parse_and_map(node, 0); - if (!irq) { - pr_err("failed to get irq for clockevent\n"); - goto unmap_comm; - } - - of_property_read_u32(node, "renesas,channel", &ch); - - timer16_priv.mapbase = base[REG_CH]; - timer16_priv.mapcommon = base[REG_COMM]; - timer16_priv.enb = ch; - timer16_priv.ovf = ch; - timer16_priv.ovie = 4 + ch; - - ret = request_irq(irq, timer16_interrupt, - IRQF_TIMER, timer16_priv.cs.name, &timer16_priv); - if (ret < 0) { - pr_err("failed to request irq %d of clocksource\n", irq); - goto unmap_comm; - } - - clocksource_register_hz(&timer16_priv.cs, - clk_get_rate(clk) / 8); - return 0; - -unmap_comm: - iounmap(base[REG_COMM]); -unmap_ch: - iounmap(base[REG_CH]); -free_clk: - clk_put(clk); - return ret; -} - -TIMER_OF_DECLARE(h8300_16bit, "renesas,16bit-timer", - h8300_16timer_init); diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c deleted file mode 100644 index 47114c2a7cb5..000000000000 --- a/drivers/clocksource/h8300_timer8.c +++ /dev/null @@ -1,211 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * linux/arch/h8300/kernel/cpu/timer/timer8.c - * - * Yoshinori Sato - * - * 8bit Timer driver - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define _8TCR 0 -#define _8TCSR 2 -#define TCORA 4 -#define TCORB 6 -#define _8TCNT 8 - -#define CMIEA 6 -#define CMFA 6 - -#define FLAG_STARTED (1 << 3) - -#define SCALE 64 - -#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a)) -#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a)) - -struct timer8_priv { - struct clock_event_device ced; - void __iomem *mapbase; - unsigned long flags; - unsigned int rate; -}; - -static irqreturn_t timer8_interrupt(int irq, void *dev_id) -{ - struct timer8_priv *p = dev_id; - - if (clockevent_state_oneshot(&p->ced)) - iowrite16be(0x0000, p->mapbase + _8TCR); - - p->ced.event_handler(&p->ced); - - bclr(CMFA, p->mapbase + _8TCSR); - - return IRQ_HANDLED; -} - -static void timer8_set_next(struct timer8_priv *p, unsigned long delta) -{ - if (delta >= 0x10000) - pr_warn("delta out of range\n"); - bclr(CMIEA, p->mapbase + _8TCR); - iowrite16be(delta, p->mapbase + TCORA); - iowrite16be(0x0000, p->mapbase + _8TCNT); - bclr(CMFA, p->mapbase + _8TCSR); - bset(CMIEA, p->mapbase + _8TCR); -} - -static int timer8_enable(struct timer8_priv *p) -{ - iowrite16be(0xffff, p->mapbase + TCORA); - iowrite16be(0x0000, p->mapbase + _8TCNT); - iowrite16be(0x0c02, p->mapbase + _8TCR); - - return 0; -} - -static int timer8_start(struct timer8_priv *p) -{ - int ret; - - if ((p->flags & FLAG_STARTED)) - return 0; - - ret = timer8_enable(p); - if (!ret) - p->flags |= FLAG_STARTED; - - return ret; -} - -static void timer8_stop(struct timer8_priv *p) -{ - iowrite16be(0x0000, p->mapbase + _8TCR); -} - -static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced) -{ - return container_of(ced, struct timer8_priv, ced); -} - -static void timer8_clock_event_start(struct timer8_priv *p, unsigned long delta) -{ - timer8_start(p); - timer8_set_next(p, delta); -} - -static int timer8_clock_event_shutdown(struct clock_event_device *ced) -{ - timer8_stop(ced_to_priv(ced)); - return 0; -} - -static int timer8_clock_event_periodic(struct clock_event_device *ced) -{ - struct timer8_priv *p = ced_to_priv(ced); - - pr_info("%s: used for periodic clock events\n", ced->name); - timer8_stop(p); - timer8_clock_event_start(p, (p->rate + HZ/2) / HZ); - - return 0; -} - -static int timer8_clock_event_oneshot(struct clock_event_device *ced) -{ - struct timer8_priv *p = ced_to_priv(ced); - - pr_info("%s: used for oneshot clock events\n", ced->name); - timer8_stop(p); - timer8_clock_event_start(p, 0x10000); - - return 0; -} - -static int timer8_clock_event_next(unsigned long delta, - struct clock_event_device *ced) -{ - struct timer8_priv *p = ced_to_priv(ced); - - BUG_ON(!clockevent_state_oneshot(ced)); - timer8_set_next(p, delta - 1); - - return 0; -} - -static struct timer8_priv timer8_priv = { - .ced = { - .name = "h8300_8timer", - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .rating = 200, - .set_next_event = timer8_clock_event_next, - .set_state_shutdown = timer8_clock_event_shutdown, - .set_state_periodic = timer8_clock_event_periodic, - .set_state_oneshot = timer8_clock_event_oneshot, - }, -}; - -static int __init h8300_8timer_init(struct device_node *node) -{ - void __iomem *base; - int irq, ret; - struct clk *clk; - - clk = of_clk_get(node, 0); - if (IS_ERR(clk)) { - pr_err("failed to get clock for clockevent\n"); - return PTR_ERR(clk); - } - - ret = -ENXIO; - base = of_iomap(node, 0); - if (!base) { - pr_err("failed to map registers for clockevent\n"); - goto free_clk; - } - - ret = -EINVAL; - irq = irq_of_parse_and_map(node, 0); - if (!irq) { - pr_err("failed to get irq for clockevent\n"); - goto unmap_reg; - } - - timer8_priv.mapbase = base; - - timer8_priv.rate = clk_get_rate(clk) / SCALE; - if (!timer8_priv.rate) { - pr_err("Failed to get rate for the clocksource\n"); - goto unmap_reg; - } - - if (request_irq(irq, timer8_interrupt, IRQF_TIMER, - timer8_priv.ced.name, &timer8_priv) < 0) { - pr_err("failed to request irq %d for clockevent\n", irq); - goto unmap_reg; - } - - clockevents_config_and_register(&timer8_priv.ced, - timer8_priv.rate, 1, 0x0000ffff); - - return 0; -unmap_reg: - iounmap(base); -free_clk: - clk_put(clk); - return ret; -} - -TIMER_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init); diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c deleted file mode 100644 index 17d4ab0f6ad1..000000000000 --- a/drivers/clocksource/h8300_tpu.c +++ /dev/null @@ -1,158 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * H8S TPU Driver - * - * Copyright 2015 Yoshinori Sato - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define TCR 0x0 -#define TSR 0x5 -#define TCNT 0x6 - -#define TCFV 0x10 - -struct tpu_priv { - struct clocksource cs; - void __iomem *mapbase1; - void __iomem *mapbase2; - raw_spinlock_t lock; - unsigned int cs_enabled; -}; - -static inline unsigned long read_tcnt32(struct tpu_priv *p) -{ - unsigned long tcnt; - - tcnt = ioread16be(p->mapbase1 + TCNT) << 16; - tcnt |= ioread16be(p->mapbase2 + TCNT); - return tcnt; -} - -static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val) -{ - unsigned long v1, v2, v3; - int o1, o2; - - o1 = ioread8(p->mapbase1 + TSR) & TCFV; - - /* Make sure the timer value is stable. Stolen from acpi_pm.c */ - do { - o2 = o1; - v1 = read_tcnt32(p); - v2 = read_tcnt32(p); - v3 = read_tcnt32(p); - o1 = ioread8(p->mapbase1 + TSR) & TCFV; - } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) - || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); - - *val = v2; - return o1; -} - -static inline struct tpu_priv *cs_to_priv(struct clocksource *cs) -{ - return container_of(cs, struct tpu_priv, cs); -} - -static u64 tpu_clocksource_read(struct clocksource *cs) -{ - struct tpu_priv *p = cs_to_priv(cs); - unsigned long flags; - unsigned long long value; - - raw_spin_lock_irqsave(&p->lock, flags); - if (tpu_get_counter(p, &value)) - value += 0x100000000; - raw_spin_unlock_irqrestore(&p->lock, flags); - - return value; -} - -static int tpu_clocksource_enable(struct clocksource *cs) -{ - struct tpu_priv *p = cs_to_priv(cs); - - WARN_ON(p->cs_enabled); - - iowrite16be(0, p->mapbase1 + TCNT); - iowrite16be(0, p->mapbase2 + TCNT); - iowrite8(0x0f, p->mapbase1 + TCR); - iowrite8(0x03, p->mapbase2 + TCR); - - p->cs_enabled = true; - return 0; -} - -static void tpu_clocksource_disable(struct clocksource *cs) -{ - struct tpu_priv *p = cs_to_priv(cs); - - WARN_ON(!p->cs_enabled); - - iowrite8(0, p->mapbase1 + TCR); - iowrite8(0, p->mapbase2 + TCR); - p->cs_enabled = false; -} - -static struct tpu_priv tpu_priv = { - .cs = { - .name = "H8S_TPU", - .rating = 200, - .read = tpu_clocksource_read, - .enable = tpu_clocksource_enable, - .disable = tpu_clocksource_disable, - .mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, - }, -}; - -#define CH_L 0 -#define CH_H 1 - -static int __init h8300_tpu_init(struct device_node *node) -{ - void __iomem *base[2]; - struct clk *clk; - int ret = -ENXIO; - - clk = of_clk_get(node, 0); - if (IS_ERR(clk)) { - pr_err("failed to get clock for clocksource\n"); - return PTR_ERR(clk); - } - - base[CH_L] = of_iomap(node, CH_L); - if (!base[CH_L]) { - pr_err("failed to map registers for clocksource\n"); - goto free_clk; - } - base[CH_H] = of_iomap(node, CH_H); - if (!base[CH_H]) { - pr_err("failed to map registers for clocksource\n"); - goto unmap_L; - } - - tpu_priv.mapbase1 = base[CH_L]; - tpu_priv.mapbase2 = base[CH_H]; - - return clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64); - -unmap_L: - iounmap(base[CH_H]); -free_clk: - clk_put(clk); - return ret; -} - -TIMER_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init); diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 7038957f4a77..95f5d14557f3 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -330,17 +330,6 @@ config INGENIC_TCU_IRQ If unsure, say N. -config RENESAS_H8300H_INTC - bool - select IRQ_DOMAIN - -config RENESAS_H8S_INTC - bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST - select IRQ_DOMAIN - help - Enable support for the Renesas H8/300 Interrupt Controller, as found - on Renesas H8S SoCs. - config IMX_GPCV2 bool select IRQ_DOMAIN diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index c1f611cbfbf8..e555dba371bf 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -70,8 +70,6 @@ obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o obj-$(CONFIG_ARCH_MEDIATEK) += irq-mtk-sysirq.o irq-mtk-cirq.o obj-$(CONFIG_ARCH_DIGICOLOR) += irq-digicolor.o -obj-$(CONFIG_RENESAS_H8300H_INTC) += irq-renesas-h8300h.o -obj-$(CONFIG_RENESAS_H8S_INTC) += irq-renesas-h8s.o obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o obj-$(CONFIG_INGENIC_TCU_IRQ) += irq-ingenic-tcu.o diff --git a/drivers/irqchip/irq-renesas-h8300h.c b/drivers/irqchip/irq-renesas-h8300h.c deleted file mode 100644 index 1054d74b7edd..000000000000 --- a/drivers/irqchip/irq-renesas-h8300h.c +++ /dev/null @@ -1,94 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * H8/300H interrupt controller driver - * - * Copyright 2015 Yoshinori Sato - */ - -#include -#include -#include -#include -#include -#include - -static const char ipr_bit[] = { - 7, 6, 5, 5, - 4, 4, 4, 4, 3, 3, 3, 3, - 2, 2, 2, 2, 1, 1, 1, 1, - 0, 0, 0, 0, 15, 15, 15, 15, - 14, 14, 14, 14, 13, 13, 13, 13, - -1, -1, -1, -1, 11, 11, 11, 11, - 10, 10, 10, 10, 9, 9, 9, 9, -}; - -static void __iomem *intc_baseaddr; - -#define IPR (intc_baseaddr + 6) - -static void h8300h_disable_irq(struct irq_data *data) -{ - int bit; - int irq = data->irq - 12; - - bit = ipr_bit[irq]; - if (bit >= 0) { - if (bit < 8) - ctrl_bclr(bit & 7, IPR); - else - ctrl_bclr(bit & 7, (IPR+1)); - } -} - -static void h8300h_enable_irq(struct irq_data *data) -{ - int bit; - int irq = data->irq - 12; - - bit = ipr_bit[irq]; - if (bit >= 0) { - if (bit < 8) - ctrl_bset(bit & 7, IPR); - else - ctrl_bset(bit & 7, (IPR+1)); - } -} - -struct irq_chip h8300h_irq_chip = { - .name = "H8/300H-INTC", - .irq_enable = h8300h_enable_irq, - .irq_disable = h8300h_disable_irq, -}; - -static int irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw_irq_num) -{ - irq_set_chip_and_handler(virq, &h8300h_irq_chip, handle_simple_irq); - - return 0; -} - -static const struct irq_domain_ops irq_ops = { - .map = irq_map, - .xlate = irq_domain_xlate_onecell, -}; - -static int __init h8300h_intc_of_init(struct device_node *intc, - struct device_node *parent) -{ - struct irq_domain *domain; - - intc_baseaddr = of_iomap(intc, 0); - BUG_ON(!intc_baseaddr); - - /* All interrupt priority low */ - writeb(0x00, IPR + 0); - writeb(0x00, IPR + 1); - - domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL); - BUG_ON(!domain); - irq_set_default_host(domain); - return 0; -} - -IRQCHIP_DECLARE(h8300h_intc, "renesas,h8300h-intc", h8300h_intc_of_init); diff --git a/drivers/irqchip/irq-renesas-h8s.c b/drivers/irqchip/irq-renesas-h8s.c deleted file mode 100644 index 4e2461bae944..000000000000 --- a/drivers/irqchip/irq-renesas-h8s.c +++ /dev/null @@ -1,102 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * H8S interrupt controller driver - * - * Copyright 2015 Yoshinori Sato - */ - -#include -#include -#include -#include -#include - -static void *intc_baseaddr; -#define IPRA (intc_baseaddr) - -static const unsigned char ipr_table[] = { - 0x03, 0x02, 0x01, 0x00, 0x13, 0x12, 0x11, 0x10, /* 16 - 23 */ - 0x23, 0x22, 0x21, 0x20, 0x33, 0x32, 0x31, 0x30, /* 24 - 31 */ - 0x43, 0x42, 0x41, 0x40, 0x53, 0x53, 0x52, 0x52, /* 32 - 39 */ - 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, /* 40 - 47 */ - 0x50, 0x50, 0x50, 0x50, 0x63, 0x63, 0x63, 0x63, /* 48 - 55 */ - 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, /* 56 - 63 */ - 0x61, 0x61, 0x61, 0x61, 0x60, 0x60, 0x60, 0x60, /* 64 - 71 */ - 0x73, 0x73, 0x73, 0x73, 0x72, 0x72, 0x72, 0x72, /* 72 - 79 */ - 0x71, 0x71, 0x71, 0x71, 0x70, 0x83, 0x82, 0x81, /* 80 - 87 */ - 0x80, 0x80, 0x80, 0x80, 0x93, 0x93, 0x93, 0x93, /* 88 - 95 */ - 0x92, 0x92, 0x92, 0x92, 0x91, 0x91, 0x91, 0x91, /* 96 - 103 */ - 0x90, 0x90, 0x90, 0x90, 0xa3, 0xa3, 0xa3, 0xa3, /* 104 - 111 */ - 0xa2, 0xa2, 0xa2, 0xa2, 0xa1, 0xa1, 0xa1, 0xa1, /* 112 - 119 */ - 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, /* 120 - 127 */ -}; - -static void h8s_disable_irq(struct irq_data *data) -{ - int pos; - void __iomem *addr; - unsigned short pri; - int irq = data->irq; - - addr = IPRA + ((ipr_table[irq - 16] & 0xf0) >> 3); - pos = (ipr_table[irq - 16] & 0x0f) * 4; - pri = ~(0x000f << pos); - pri &= readw(addr); - writew(pri, addr); -} - -static void h8s_enable_irq(struct irq_data *data) -{ - int pos; - void __iomem *addr; - unsigned short pri; - int irq = data->irq; - - addr = IPRA + ((ipr_table[irq - 16] & 0xf0) >> 3); - pos = (ipr_table[irq - 16] & 0x0f) * 4; - pri = ~(0x000f << pos); - pri &= readw(addr); - pri |= 1 << pos; - writew(pri, addr); -} - -struct irq_chip h8s_irq_chip = { - .name = "H8S-INTC", - .irq_enable = h8s_enable_irq, - .irq_disable = h8s_disable_irq, -}; - -static __init int irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw_irq_num) -{ - irq_set_chip_and_handler(virq, &h8s_irq_chip, handle_simple_irq); - - return 0; -} - -static const struct irq_domain_ops irq_ops = { - .map = irq_map, - .xlate = irq_domain_xlate_onecell, -}; - -static int __init h8s_intc_of_init(struct device_node *intc, - struct device_node *parent) -{ - struct irq_domain *domain; - int n; - - intc_baseaddr = of_iomap(intc, 0); - BUG_ON(!intc_baseaddr); - - /* All interrupt priority is 0 (disable) */ - /* IPRA to IPRK */ - for (n = 0; n <= 'k' - 'a'; n++) - writew(0x0000, IPRA + (n * 2)); - - domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL); - BUG_ON(!domain); - irq_set_default_host(domain); - return 0; -} - -IRQCHIP_DECLARE(h8s_intc, "renesas,h8s-intc", h8s_intc_of_init); diff --git a/drivers/net/ethernet/smsc/Kconfig b/drivers/net/ethernet/smsc/Kconfig index 72e42a868346..2524c907f386 100644 --- a/drivers/net/ethernet/smsc/Kconfig +++ b/drivers/net/ethernet/smsc/Kconfig @@ -8,7 +8,7 @@ config NET_VENDOR_SMSC default y depends on ARM || ARM64 || ATARI_ETHERNAT || COLDFIRE || \ ISA || MAC || MIPS || NIOS2 || PCI || \ - PCMCIA || SUPERH || XTENSA || H8300 || COMPILE_TEST + PCMCIA || SUPERH || XTENSA || COMPILE_TEST help If you have a network (Ethernet) card belonging to this class, say Y. @@ -40,7 +40,7 @@ config SMC91X select MII depends on !OF || GPIOLIB depends on ARM || ARM64 || ATARI_ETHERNAT || COLDFIRE || \ - MIPS || NIOS2 || SUPERH || XTENSA || H8300 || COMPILE_TEST + MIPS || NIOS2 || SUPERH || XTENSA || COMPILE_TEST help This is a driver for SMC's 91x series of Ethernet chipsets, including the SMC91C94 and the SMC91C111. Say Y if you want it diff --git a/drivers/net/ethernet/smsc/smc91x.h b/drivers/net/ethernet/smsc/smc91x.h index 387539a8094b..c521ea8f94f2 100644 --- a/drivers/net/ethernet/smsc/smc91x.h +++ b/drivers/net/ethernet/smsc/smc91x.h @@ -182,17 +182,6 @@ static inline void mcf_outsw(void *a, unsigned char *p, int l) #define SMC_IRQ_FLAGS 0 -#elif defined(CONFIG_H8300) -#define SMC_CAN_USE_8BIT 1 -#define SMC_CAN_USE_16BIT 0 -#define SMC_CAN_USE_32BIT 0 -#define SMC_NOWAIT 0 - -#define SMC_inb(a, r) ioread8((a) + (r)) -#define SMC_outb(v, a, r) iowrite8(v, (a) + (r)) -#define SMC_insb(a, r, p, l) ioread8_rep((a) + (r), p, l) -#define SMC_outsb(a, r, p, l) iowrite8_rep((a) + (r), p, l) - #else /* diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 0e5ccb25bdb1..3eaf8fbd76f9 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -653,7 +653,7 @@ config SERIAL_IP22_ZILOG_CONSOLE config SERIAL_SH_SCI tristate "SuperH SCI(F) serial port support" - depends on SUPERH || ARCH_RENESAS || H8300 || COMPILE_TEST + depends on SUPERH || ARCH_RENESAS || COMPILE_TEST select SERIAL_CORE select SERIAL_MCTRL_GPIO if GPIOLIB @@ -662,7 +662,6 @@ config SERIAL_SH_SCI_NR_UARTS range 1 64 if 64BIT range 1 32 if !64BIT depends on SERIAL_SH_SCI - default "3" if H8300 default "10" if SUPERH default "18" if ARCH_RENESAS default "2" @@ -678,7 +677,7 @@ config SERIAL_SH_SCI_EARLYCON depends on SERIAL_SH_SCI=y select SERIAL_CORE_CONSOLE select SERIAL_EARLYCON - default ARCH_RENESAS || H8300 + default ARCH_RENESAS config SERIAL_SH_SCI_DMA bool "DMA support" if EXPERT -- cgit v1.2.3