From 0ce611c906bff3d6c3d72f3d5d8de79ea0490fa0 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Tue, 20 Nov 2018 20:24:39 +0000 Subject: drm/i915/dp: Fix inconsistent indenting Always show the FEC capability as it is initialised to 0 before error. Fixing, drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn: inconsistent indenting Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register") Signed-off-by: Chris Wilson Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi Navare Cc: Anusha Srivatsa Reviewed-by: Anusha Srivatsa Link: https://patchwork.freedesktop.org/patch/msgid/20181120202439.13017-2-chris@chris-wilson.co.uk --- drivers/gpu/drm/i915/intel_dp.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index a6907a1761ab..fdd2cbc56fa3 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4026,15 +4026,14 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp) DRM_DEBUG_KMS("DSC DPCD: %*ph\n", (int)sizeof(intel_dp->dsc_dpcd), intel_dp->dsc_dpcd); + /* FEC is supported only on DP 1.4 */ - if (!intel_dp_is_edp(intel_dp)) { - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY, - &intel_dp->fec_capable) < 0) - DRM_ERROR("Failed to read FEC DPCD register\n"); + if (!intel_dp_is_edp(intel_dp) && + drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY, + &intel_dp->fec_capable) < 0) + DRM_ERROR("Failed to read FEC DPCD register\n"); - DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", - intel_dp->fec_capable); - } + DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp->fec_capable); } } -- cgit v1.2.3