From b33f69f56352f61bba77f91b07318c5482562be8 Mon Sep 17 00:00:00 2001 From: Nishad Kamdar Date: Sat, 28 Mar 2020 15:34:46 +0530 Subject: USB: dwc3: Use the correct style for SPDX License Identifier This patch corrects the SPDX License Identifier style in header files related to DesignWare USB3 DRD Core Support. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches Signed-off-by: Nishad Kamdar Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.h | 2 +- drivers/usb/dwc3/debug.h | 2 +- drivers/usb/dwc3/gadget.h | 2 +- drivers/usb/dwc3/io.h | 2 +- drivers/usb/dwc3/trace.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 4c171a8e215f..e054a79024c7 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * core.h - DesignWare USB3 DRD Core Header * diff --git a/drivers/usb/dwc3/debug.h b/drivers/usb/dwc3/debug.h index 4a13ceaf4093..0f95656c9622 100644 --- a/drivers/usb/dwc3/debug.h +++ b/drivers/usb/dwc3/debug.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /** * debug.h - DesignWare USB3 DRD Controller Debug Header * diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h index fbc7d8013f0b..24dca3872022 100644 --- a/drivers/usb/dwc3/gadget.h +++ b/drivers/usb/dwc3/gadget.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * gadget.h - DesignWare USB3 DRD Gadget Header * diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h index 70acdf94a0bf..9bbe5d4bf076 100644 --- a/drivers/usb/dwc3/io.h +++ b/drivers/usb/dwc3/io.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /** * io.h - DesignWare USB3 DRD IO Header * diff --git a/drivers/usb/dwc3/trace.h b/drivers/usb/dwc3/trace.h index 3054b89512ff..4c4fc6c41d9b 100644 --- a/drivers/usb/dwc3/trace.h +++ b/drivers/usb/dwc3/trace.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /** * trace.h - DesignWare USB3 DRD Controller Trace Support * -- cgit v1.2.3 From c2cd3452d5f8b66d49a73138fba5baadd5b489bd Mon Sep 17 00:00:00 2001 From: Martin Kepplinger Date: Thu, 19 Mar 2020 11:02:07 +0100 Subject: usb: dwc3: support continuous runtime PM with dual role The DRD module calls dwc3_set_mode() on role switches, i.e. when a device is being plugged in. In order to support continuous runtime power management when plugging in / unplugging a cable, we need to call pm_runtime_get_sync() in this path. Signed-off-by: Martin Kepplinger Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index edc17155cb2b..7046c681fece 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -121,17 +121,19 @@ static void __dwc3_set_mode(struct work_struct *work) if (dwc->dr_mode != USB_DR_MODE_OTG) return; + pm_runtime_get_sync(dwc->dev); + if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_OTG) dwc3_otg_update(dwc, 0); if (!dwc->desired_dr_role) - return; + goto out; if (dwc->desired_dr_role == dwc->current_dr_role) - return; + goto out; if (dwc->desired_dr_role == DWC3_GCTL_PRTCAP_OTG && dwc->edev) - return; + goto out; switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_HOST: @@ -190,6 +192,9 @@ static void __dwc3_set_mode(struct work_struct *work) break; } +out: + pm_runtime_mark_last_busy(dwc->dev); + pm_runtime_put_autosuspend(dwc->dev); } void dwc3_set_mode(struct dwc3 *dwc, u32 mode) -- cgit v1.2.3 From cb11ea56f37a36288cdd0a4799a983ee3aa437dd Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Thu, 5 Mar 2020 13:23:55 -0800 Subject: usb: dwc3: gadget: Properly handle ClearFeature(halt) DWC3 must not issue CLEAR_STALL command to control endpoints. The controller automatically clears the STALL when it receives the SETUP token. Also, when the driver receives ClearFeature(halt_ep), DWC3 must stop any active transfer from the endpoint and give back all the requests to the function drivers. Fixes: 72246da40f37 ("usb: Introduce DesignWare USB3 DRD Driver") Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 36 +++++++++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 00746c2848c0..d90a8a552542 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1508,6 +1508,10 @@ static void dwc3_gadget_ep_skip_trbs(struct dwc3_ep *dep, struct dwc3_request *r { int i; + /* If req->trb is not set, then the request has not started */ + if (!req->trb) + return; + /* * If request was already started, this means we had to * stop the transfer. With that we also need to ignore @@ -1598,6 +1602,8 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol) { struct dwc3_gadget_ep_cmd_params params; struct dwc3 *dwc = dep->dwc; + struct dwc3_request *req; + struct dwc3_request *tmp; int ret; if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) { @@ -1634,13 +1640,37 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol) else dep->flags |= DWC3_EP_STALL; } else { + /* + * Don't issue CLEAR_STALL command to control endpoints. The + * controller automatically clears the STALL when it receives + * the SETUP token. + */ + if (dep->number <= 1) { + dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE); + return 0; + } ret = dwc3_send_clear_stall_ep_cmd(dep); - if (ret) + if (ret) { dev_err(dwc->dev, "failed to clear STALL on %s\n", dep->name); - else - dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE); + return ret; + } + + dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE); + + dwc3_stop_active_transfer(dep, true, true); + + list_for_each_entry_safe(req, tmp, &dep->started_list, list) + dwc3_gadget_move_cancelled_request(req); + + list_for_each_entry_safe(req, tmp, &dep->pending_list, list) + dwc3_gadget_move_cancelled_request(req); + + if (!(dep->flags & DWC3_EP_END_TRANSFER_PENDING)) { + dep->flags &= ~DWC3_EP_DELAY_START; + dwc3_gadget_ep_cleanup_cancelled_requests(dep); + } } return ret; -- cgit v1.2.3 From a7027ca69d82ae10d9e5899b74e809e32d04d48b Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Thu, 5 Mar 2020 13:24:08 -0800 Subject: usb: dwc3: gadget: Give back staled requests If a request is dequeued, the transfer is cancelled. Give back all the started requests. In most scenarios, the function driver dequeues all requests of a transfer when there's a failure. If the function driver follows this, then it's fine. If not, then we'd be skipping TRBs at different points within the dequeue and enqueue pointers, making dequeue/enqueue pointers useless. To enforce and make sure that we're properly skipping TRBs, cancel all the started requests and give back all the cancelled requests to the function drivers. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index d90a8a552542..a99152e6dd68 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1560,6 +1560,11 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, spin_lock_irqsave(&dwc->lock, flags); + list_for_each_entry(r, &dep->cancelled_list, list) { + if (r == req) + goto out0; + } + list_for_each_entry(r, &dep->pending_list, list) { if (r == req) break; @@ -1571,13 +1576,21 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, break; } if (r == req) { + struct dwc3_request *t; + /* wait until it is processed */ dwc3_stop_active_transfer(dep, true, true); if (!r->trb) goto out0; - dwc3_gadget_move_cancelled_request(req); + /* + * Remove any started request if the transfer is + * cancelled. + */ + list_for_each_entry_safe(r, t, &dep->started_list, list) + dwc3_gadget_move_cancelled_request(r); + if (dep->flags & DWC3_EP_TRANSFER_STARTED) goto out0; else -- cgit v1.2.3 From 8411993e79df8e54da67613025d620a8a23a24fe Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Thu, 5 Mar 2020 13:24:14 -0800 Subject: usb: dwc3: gadget: Remove unnecessary checks Remove 2 unnecessary checks: 1) A request in the started_list must have its trb field set. So checking for req->trb is unnecessary. 2) An endpoint must have started (and have not ended) for the request to still be in the started_list. There's no point to check if the endpoint is started. We had this check because previously the driver didn't handle the endpoint's started/ended flags for END_TRANSFER command properly. See commit 9f45581f5eec ("usb: dwc3: gadget: early giveback if End Transfer already completed"). Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index a99152e6dd68..2b58f0e595a2 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1581,9 +1581,6 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, /* wait until it is processed */ dwc3_stop_active_transfer(dep, true, true); - if (!r->trb) - goto out0; - /* * Remove any started request if the transfer is * cancelled. @@ -1591,10 +1588,7 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, list_for_each_entry_safe(r, t, &dep->started_list, list) dwc3_gadget_move_cancelled_request(r); - if (dep->flags & DWC3_EP_TRANSFER_STARTED) - goto out0; - else - goto out1; + goto out0; } dev_err(dwc->dev, "request %pK was not queued to %s\n", request, ep->name); @@ -1602,7 +1596,6 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, goto out0; } -out1: dwc3_gadget_giveback(dep, req, -ECONNRESET); out0: -- cgit v1.2.3 From fcd2def6639293c2bde2dc4f5dab63641a60b5b3 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Thu, 5 Mar 2020 13:24:20 -0800 Subject: usb: dwc3: gadget: Refactor dwc3_gadget_ep_dequeue The flow from function dwc3_gadget_ep_dequeue() is not easy to follow. Refactor it for easier read. No functional change in this commit. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 2b58f0e595a2..58a05c59ab3f 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1562,19 +1562,17 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, list_for_each_entry(r, &dep->cancelled_list, list) { if (r == req) - goto out0; + goto out; } list_for_each_entry(r, &dep->pending_list, list) { - if (r == req) - break; + if (r == req) { + dwc3_gadget_giveback(dep, req, -ECONNRESET); + goto out; + } } - if (r != req) { - list_for_each_entry(r, &dep->started_list, list) { - if (r == req) - break; - } + list_for_each_entry(r, &dep->started_list, list) { if (r == req) { struct dwc3_request *t; @@ -1588,17 +1586,14 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, list_for_each_entry_safe(r, t, &dep->started_list, list) dwc3_gadget_move_cancelled_request(r); - goto out0; + goto out; } - dev_err(dwc->dev, "request %pK was not queued to %s\n", - request, ep->name); - ret = -EINVAL; - goto out0; } - dwc3_gadget_giveback(dep, req, -ECONNRESET); - -out0: + dev_err(dwc->dev, "request %pK was not queued to %s\n", + request, ep->name); + ret = -EINVAL; +out: spin_unlock_irqrestore(&dwc->lock, flags); return ret; -- cgit v1.2.3 From 5174564cb9156a7c7b4d94a64c1cafdfd9a20403 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 26 Mar 2020 14:44:54 +0100 Subject: usb: dwc3: meson-g12a: specify phy names in soc data To handle the variable USB2 PHY counts on GXL and GXM SoCs, add the possible PHY names for each SoC in the compatible match data. Reviewed-by: Martin Blumenstingl Acked-by: Hanjie Lin Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-meson-g12a.c | 47 ++++++++++++++++++++++++++------------ 1 file changed, 33 insertions(+), 14 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index b81d085bc534..f49c9e266537 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -96,16 +96,8 @@ #define USB_R5_ID_DIG_TH_MASK GENMASK(15, 8) #define USB_R5_ID_DIG_CNT_MASK GENMASK(23, 16) -enum { - USB2_HOST_PHY = 0, - USB2_OTG_PHY, - USB3_HOST_PHY, - PHY_COUNT, -}; - -static const char *phy_names[PHY_COUNT] = { - "usb2-phy0", "usb2-phy1", "usb3-phy0", -}; +#define PHY_COUNT 3 +#define USB2_OTG_PHY 1 static struct clk_bulk_data meson_g12a_clocks[] = { { .id = NULL }, @@ -117,22 +109,44 @@ static struct clk_bulk_data meson_a1_clocks[] = { { .id = "xtal_usb_ctrl" }, }; +static const char *meson_g12a_phy_names[] = { + "usb2-phy0", "usb2-phy1", "usb3-phy0", +}; + +/* + * Amlogic A1 has a single physical PHY, in slot 1, but still has the + * two U2 PHY controls register blocks like G12A. + * Handling the first PHY on slot 1 would need a large amount of code + * changes, and the current management is generic enough to handle it + * correctly when only the "usb2-phy1" phy is specified on-par with the + * DT bindings. + */ +static const char *meson_a1_phy_names[] = { + "usb2-phy0", "usb2-phy1" +}; + struct dwc3_meson_g12a_drvdata { bool otg_switch_supported; struct clk_bulk_data *clks; int num_clks; + const char **phy_names; + int num_phys; }; static struct dwc3_meson_g12a_drvdata g12a_drvdata = { .otg_switch_supported = true, .clks = meson_g12a_clocks, .num_clks = ARRAY_SIZE(meson_g12a_clocks), + .phy_names = meson_g12a_phy_names, + .num_phys = ARRAY_SIZE(meson_g12a_phy_names), }; static struct dwc3_meson_g12a_drvdata a1_drvdata = { .otg_switch_supported = false, .clks = meson_a1_clocks, .num_clks = ARRAY_SIZE(meson_a1_clocks), + .phy_names = meson_a1_phy_names, + .num_phys = ARRAY_SIZE(meson_a1_phy_names), }; struct dwc3_meson_g12a { @@ -171,10 +185,13 @@ static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv) else priv->otg_phy_mode = PHY_MODE_USB_HOST; - for (i = 0 ; i < USB3_HOST_PHY ; ++i) { + for (i = 0; i < priv->drvdata->num_phys; ++i) { if (!priv->phys[i]) continue; + if (!strstr(priv->drvdata->phy_names[i], "usb2")) + continue; + regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i), U2P_R0_POWER_ON_RESET, U2P_R0_POWER_ON_RESET); @@ -284,17 +301,19 @@ static const struct regmap_config phy_meson_g12a_usb3_regmap_conf = { static int dwc3_meson_g12a_get_phys(struct dwc3_meson_g12a *priv) { + const char *phy_name; int i; - for (i = 0 ; i < PHY_COUNT ; ++i) { - priv->phys[i] = devm_phy_optional_get(priv->dev, phy_names[i]); + for (i = 0 ; i < priv->drvdata->num_phys ; ++i) { + phy_name = priv->drvdata->phy_names[i]; + priv->phys[i] = devm_phy_optional_get(priv->dev, phy_name); if (!priv->phys[i]) continue; if (IS_ERR(priv->phys[i])) return PTR_ERR(priv->phys[i]); - if (i == USB3_HOST_PHY) + if (strstr(phy_name, "usb3")) priv->usb3_ports++; else priv->usb2_ports++; -- cgit v1.2.3 From 013af227f58a97ffc61b99301f8f4448dc7e7f55 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 26 Mar 2020 14:44:55 +0100 Subject: usb: dwc3: meson-g12a: handle the phy and glue registers separately On the Amlogic GXL/GXM SoCs, only the USB control registers are available, the PHY mode being handled in the PHY registers. Thus, handle the PHY mode registers in separate regmaps and prepare support for Amlogic GXL/GXM SoCs by moving the regmap setup in a callback set in the SoC match data. Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-meson-g12a.c | 124 +++++++++++++++++++++++++------------ 1 file changed, 85 insertions(+), 39 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index f49c9e266537..d7eff4d7c5fe 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -30,7 +30,7 @@ #include #include -/* USB2 Ports Control Registers */ +/* USB2 Ports Control Registers, offsets are per-port */ #define U2P_REG_SIZE 0x20 @@ -50,14 +50,16 @@ /* USB Glue Control Registers */ -#define USB_R0 0x80 +#define G12A_GLUE_OFFSET 0x80 + +#define USB_R0 0x00 #define USB_R0_P30_LANE0_TX2RX_LOOPBACK BIT(17) #define USB_R0_P30_LANE0_EXT_PCLK_REQ BIT(18) #define USB_R0_P30_PCS_RX_LOS_MASK_VAL_MASK GENMASK(28, 19) #define USB_R0_U2D_SS_SCALEDOWN_MODE_MASK GENMASK(30, 29) #define USB_R0_U2D_ACT BIT(31) -#define USB_R1 0x84 +#define USB_R1 0x04 #define USB_R1_U3H_BIGENDIAN_GS BIT(0) #define USB_R1_U3H_PME_ENABLE BIT(1) #define USB_R1_U3H_HUB_PORT_OVERCURRENT_MASK GENMASK(4, 2) @@ -69,23 +71,23 @@ #define USB_R1_U3H_FLADJ_30MHZ_REG_MASK GENMASK(24, 19) #define USB_R1_P30_PCS_TX_SWING_FULL_MASK GENMASK(31, 25) -#define USB_R2 0x88 +#define USB_R2 0x08 #define USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK GENMASK(25, 20) #define USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK GENMASK(31, 26) -#define USB_R3 0x8c +#define USB_R3 0x0c #define USB_R3_P30_SSC_ENABLE BIT(0) #define USB_R3_P30_SSC_RANGE_MASK GENMASK(3, 1) #define USB_R3_P30_SSC_REF_CLK_SEL_MASK GENMASK(12, 4) #define USB_R3_P30_REF_SSP_EN BIT(13) -#define USB_R4 0x90 +#define USB_R4 0x10 #define USB_R4_P21_PORT_RESET_0 BIT(0) #define USB_R4_P21_SLEEP_M0 BIT(1) #define USB_R4_MEM_PD_MASK GENMASK(3, 2) #define USB_R4_P21_ONLY BIT(4) -#define USB_R5 0x94 +#define USB_R5 0x14 #define USB_R5_ID_DIG_SYNC BIT(0) #define USB_R5_ID_DIG_REG BIT(1) #define USB_R5_ID_DIG_CFG_MASK GENMASK(3, 2) @@ -125,20 +127,27 @@ static const char *meson_a1_phy_names[] = { "usb2-phy0", "usb2-phy1" }; +struct dwc3_meson_g12a; + struct dwc3_meson_g12a_drvdata { bool otg_switch_supported; struct clk_bulk_data *clks; int num_clks; const char **phy_names; int num_phys; + int (*setup_regmaps)(struct dwc3_meson_g12a *priv, void __iomem *base); }; +static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv, + void __iomem *base); + static struct dwc3_meson_g12a_drvdata g12a_drvdata = { .otg_switch_supported = true, .clks = meson_g12a_clocks, .num_clks = ARRAY_SIZE(meson_g12a_clocks), .phy_names = meson_g12a_phy_names, .num_phys = ARRAY_SIZE(meson_g12a_phy_names), + .setup_regmaps = dwc3_meson_g12a_setup_regmaps, }; static struct dwc3_meson_g12a_drvdata a1_drvdata = { @@ -147,11 +156,13 @@ static struct dwc3_meson_g12a_drvdata a1_drvdata = { .num_clks = ARRAY_SIZE(meson_a1_clocks), .phy_names = meson_a1_phy_names, .num_phys = ARRAY_SIZE(meson_a1_phy_names), + .setup_regmaps = dwc3_meson_g12a_setup_regmaps, }; struct dwc3_meson_g12a { struct device *dev; - struct regmap *regmap; + struct regmap *u2p_regmap[PHY_COUNT]; + struct regmap *usb_glue_regmap; struct reset_control *reset; struct phy *phys[PHY_COUNT]; enum usb_dr_mode otg_mode; @@ -168,11 +179,11 @@ static void dwc3_meson_g12a_usb2_set_mode(struct dwc3_meson_g12a *priv, int i, enum phy_mode mode) { if (mode == PHY_MODE_USB_HOST) - regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i), + regmap_update_bits(priv->u2p_regmap[i], U2P_R0, U2P_R0_HOST_DEVICE, U2P_R0_HOST_DEVICE); else - regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i), + regmap_update_bits(priv->u2p_regmap[i], U2P_R0, U2P_R0_HOST_DEVICE, 0); } @@ -192,13 +203,12 @@ static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv) if (!strstr(priv->drvdata->phy_names[i], "usb2")) continue; - regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i), + regmap_update_bits(priv->u2p_regmap[i], U2P_R0, U2P_R0_POWER_ON_RESET, U2P_R0_POWER_ON_RESET); if (priv->drvdata->otg_switch_supported && i == USB2_OTG_PHY) { - regmap_update_bits(priv->regmap, - U2P_R0 + (U2P_REG_SIZE * i), + regmap_update_bits(priv->u2p_regmap[i], U2P_R0, U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS, U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS); @@ -208,7 +218,7 @@ static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv) dwc3_meson_g12a_usb2_set_mode(priv, i, PHY_MODE_USB_HOST); - regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i), + regmap_update_bits(priv->u2p_regmap[i], U2P_R0, U2P_R0_POWER_ON_RESET, 0); } @@ -217,7 +227,7 @@ static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv) static void dwc3_meson_g12a_usb3_init(struct dwc3_meson_g12a *priv) { - regmap_update_bits(priv->regmap, USB_R3, + regmap_update_bits(priv->usb_glue_regmap, USB_R3, USB_R3_P30_SSC_RANGE_MASK | USB_R3_P30_REF_SSP_EN, USB_R3_P30_SSC_ENABLE | @@ -225,21 +235,21 @@ static void dwc3_meson_g12a_usb3_init(struct dwc3_meson_g12a *priv) USB_R3_P30_REF_SSP_EN); udelay(2); - regmap_update_bits(priv->regmap, USB_R2, + regmap_update_bits(priv->usb_glue_regmap, USB_R2, USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK, FIELD_PREP(USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK, 0x15)); - regmap_update_bits(priv->regmap, USB_R2, + regmap_update_bits(priv->usb_glue_regmap, USB_R2, USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK, FIELD_PREP(USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK, 0x20)); udelay(2); - regmap_update_bits(priv->regmap, USB_R1, + regmap_update_bits(priv->usb_glue_regmap, USB_R1, USB_R1_U3H_HOST_PORT_POWER_CONTROL_PRESENT, USB_R1_U3H_HOST_PORT_POWER_CONTROL_PRESENT); - regmap_update_bits(priv->regmap, USB_R1, + regmap_update_bits(priv->usb_glue_regmap, USB_R1, USB_R1_P30_PCS_TX_SWING_FULL_MASK, FIELD_PREP(USB_R1_P30_PCS_TX_SWING_FULL_MASK, 127)); } @@ -247,16 +257,16 @@ static void dwc3_meson_g12a_usb3_init(struct dwc3_meson_g12a *priv) static void dwc3_meson_g12a_usb_otg_apply_mode(struct dwc3_meson_g12a *priv) { if (priv->otg_phy_mode == PHY_MODE_USB_DEVICE) { - regmap_update_bits(priv->regmap, USB_R0, + regmap_update_bits(priv->usb_glue_regmap, USB_R0, USB_R0_U2D_ACT, USB_R0_U2D_ACT); - regmap_update_bits(priv->regmap, USB_R0, + regmap_update_bits(priv->usb_glue_regmap, USB_R0, USB_R0_U2D_SS_SCALEDOWN_MODE_MASK, 0); - regmap_update_bits(priv->regmap, USB_R4, + regmap_update_bits(priv->usb_glue_regmap, USB_R4, USB_R4_P21_SLEEP_M0, USB_R4_P21_SLEEP_M0); } else { - regmap_update_bits(priv->regmap, USB_R0, + regmap_update_bits(priv->usb_glue_regmap, USB_R0, USB_R0_U2D_ACT, 0); - regmap_update_bits(priv->regmap, USB_R4, + regmap_update_bits(priv->usb_glue_regmap, USB_R4, USB_R4_P21_SLEEP_M0, 0); } } @@ -269,17 +279,17 @@ static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv) if (ret) return ret; - regmap_update_bits(priv->regmap, USB_R1, + regmap_update_bits(priv->usb_glue_regmap, USB_R1, USB_R1_U3H_FLADJ_30MHZ_REG_MASK, FIELD_PREP(USB_R1_U3H_FLADJ_30MHZ_REG_MASK, 0x20)); - regmap_update_bits(priv->regmap, USB_R5, + regmap_update_bits(priv->usb_glue_regmap, USB_R5, USB_R5_ID_DIG_EN_0, USB_R5_ID_DIG_EN_0); - regmap_update_bits(priv->regmap, USB_R5, + regmap_update_bits(priv->usb_glue_regmap, USB_R5, USB_R5_ID_DIG_EN_1, USB_R5_ID_DIG_EN_1); - regmap_update_bits(priv->regmap, USB_R5, + regmap_update_bits(priv->usb_glue_regmap, USB_R5, USB_R5_ID_DIG_TH_MASK, FIELD_PREP(USB_R5_ID_DIG_TH_MASK, 0xff)); @@ -292,7 +302,8 @@ static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv) return 0; } -static const struct regmap_config phy_meson_g12a_usb3_regmap_conf = { +static const struct regmap_config phy_meson_g12a_usb_glue_regmap_conf = { + .name = "usb-glue", .reg_bits = 8, .val_bits = 32, .reg_stride = 4, @@ -329,7 +340,7 @@ static enum phy_mode dwc3_meson_g12a_get_id(struct dwc3_meson_g12a *priv) { u32 reg; - regmap_read(priv->regmap, USB_R5, ®); + regmap_read(priv->usb_glue_regmap, USB_R5, ®); if (reg & (USB_R5_ID_DIG_SYNC | USB_R5_ID_DIG_REG)) return PHY_MODE_USB_DEVICE; @@ -405,7 +416,8 @@ static irqreturn_t dwc3_meson_g12a_irq_thread(int irq, void *data) dev_warn(priv->dev, "Failed to switch OTG mode\n"); } - regmap_update_bits(priv->regmap, USB_R5, USB_R5_ID_DIG_IRQ, 0); + regmap_update_bits(priv->usb_glue_regmap, USB_R5, + USB_R5_ID_DIG_IRQ, 0); return IRQ_HANDLED; } @@ -440,7 +452,7 @@ static int dwc3_meson_g12a_otg_init(struct platform_device *pdev, if (priv->otg_mode == USB_DR_MODE_OTG) { /* Ack irq before registering */ - regmap_update_bits(priv->regmap, USB_R5, + regmap_update_bits(priv->usb_glue_regmap, USB_R5, USB_R5_ID_DIG_IRQ, 0); irq = platform_get_irq(pdev, 0); @@ -476,6 +488,41 @@ static int dwc3_meson_g12a_otg_init(struct platform_device *pdev, return 0; } +static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv, + void __iomem *base) +{ + int i; + + priv->usb_glue_regmap = devm_regmap_init_mmio(priv->dev, + base + G12A_GLUE_OFFSET, + &phy_meson_g12a_usb_glue_regmap_conf); + if (IS_ERR(priv->usb_glue_regmap)) + return PTR_ERR(priv->usb_glue_regmap); + + /* Create a regmap for each USB2 PHY control register set */ + for (i = 0; i < priv->usb2_ports; i++) { + struct regmap_config u2p_regmap_config = { + .reg_bits = 8, + .val_bits = 32, + .reg_stride = 4, + .max_register = U2P_R1, + }; + + u2p_regmap_config.name = devm_kasprintf(priv->dev, GFP_KERNEL, + "u2p-%d", i); + if (!u2p_regmap_config.name) + return -ENOMEM; + + priv->u2p_regmap[i] = devm_regmap_init_mmio(priv->dev, + base + (i * U2P_REG_SIZE), + &u2p_regmap_config); + if (IS_ERR(priv->u2p_regmap[i])) + return PTR_ERR(priv->u2p_regmap[i]); + } + + return 0; +} + static int dwc3_meson_g12a_probe(struct platform_device *pdev) { struct dwc3_meson_g12a *priv; @@ -492,10 +539,12 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) if (IS_ERR(base)) return PTR_ERR(base); - priv->regmap = devm_regmap_init_mmio(dev, base, - &phy_meson_g12a_usb3_regmap_conf); - if (IS_ERR(priv->regmap)) - return PTR_ERR(priv->regmap); + priv->drvdata = of_device_get_match_data(&pdev->dev); + + priv->dev = dev; + ret = priv->drvdata->setup_regmaps(priv, base); + if (ret) + return ret; priv->vbus = devm_regulator_get_optional(dev, "vbus"); if (IS_ERR(priv->vbus)) { @@ -504,8 +553,6 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) priv->vbus = NULL; } - priv->drvdata = of_device_get_match_data(&pdev->dev); - ret = devm_clk_bulk_get(dev, priv->drvdata->num_clks, priv->drvdata->clks); @@ -518,7 +565,6 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) return ret; platform_set_drvdata(pdev, priv); - priv->dev = dev; priv->reset = devm_reset_control_get(dev, NULL); if (IS_ERR(priv->reset)) { -- cgit v1.2.3 From 6d9fa35a347a8789aefa8f4dc7aab9d006e8ed4e Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 26 Mar 2020 14:44:56 +0100 Subject: usb: dwc3: meson-g12a: get the reset as shared In order to support the Amlogic GXL/GXM SoCs, the reset line must be handled as shared since also used by the PHYs. Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-meson-g12a.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index d7eff4d7c5fe..4be3ab6099ed 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -566,7 +566,7 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) platform_set_drvdata(pdev, priv); - priv->reset = devm_reset_control_get(dev, NULL); + priv->reset = devm_reset_control_get_shared(dev, NULL); if (IS_ERR(priv->reset)) { ret = PTR_ERR(priv->reset); dev_err(dev, "failed to get device reset, err=%d\n", ret); -- cgit v1.2.3 From 8f5bc1ec770c2bdc8c604ba4119a77d81d8f3529 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 26 Mar 2020 14:44:57 +0100 Subject: usb: dwc3: meson-g12a: check return of dwc3_meson_g12a_usb_init The dwc3_meson_g12a_usb_init function can return an error, check it. Fixes: c99993376f72ca ("usb: dwc3: Add Amlogic G12A DWC3 glue") Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-meson-g12a.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index 4be3ab6099ed..63510125d42e 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -590,7 +590,9 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) /* Get dr_mode */ priv->otg_mode = usb_get_dr_mode(dev); - dwc3_meson_g12a_usb_init(priv); + ret = dwc3_meson_g12a_usb_init(priv); + if (ret) + goto err_disable_clks; /* Init PHYs */ for (i = 0 ; i < PHY_COUNT ; ++i) { -- cgit v1.2.3 From 31306821d87723d63f1be6908c7187719f282eff Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 26 Mar 2020 14:44:58 +0100 Subject: usb: dwc3: meson-g12a: refactor usb2 phy init Refactor the USB2 PHY init code patch to handle the Amlogic GXL/GXM not having the PHY mode control registers in the Glue but in the PHY registers. The Amlogic GXL/GXM will call phy_set_mode() instead of programming the PHY mode control registers, thus add two new callbacks to the SoC match data. Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-meson-g12a.c | 74 +++++++++++++++++++++++++++----------- 1 file changed, 53 insertions(+), 21 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index 63510125d42e..7027ee2ee4ab 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -136,11 +136,21 @@ struct dwc3_meson_g12a_drvdata { const char **phy_names; int num_phys; int (*setup_regmaps)(struct dwc3_meson_g12a *priv, void __iomem *base); + int (*usb2_init_phy)(struct dwc3_meson_g12a *priv, int i, + enum phy_mode mode); + int (*set_phy_mode)(struct dwc3_meson_g12a *priv, int i, + enum phy_mode mode); }; static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv, void __iomem *base); +static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i, + enum phy_mode mode); + +static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv, + int i, enum phy_mode mode); + static struct dwc3_meson_g12a_drvdata g12a_drvdata = { .otg_switch_supported = true, .clks = meson_g12a_clocks, @@ -148,6 +158,8 @@ static struct dwc3_meson_g12a_drvdata g12a_drvdata = { .phy_names = meson_g12a_phy_names, .num_phys = ARRAY_SIZE(meson_g12a_phy_names), .setup_regmaps = dwc3_meson_g12a_setup_regmaps, + .usb2_init_phy = dwc3_meson_g12a_usb2_init_phy, + .set_phy_mode = dwc3_meson_g12a_set_phy_mode, }; static struct dwc3_meson_g12a_drvdata a1_drvdata = { @@ -157,6 +169,8 @@ static struct dwc3_meson_g12a_drvdata a1_drvdata = { .phy_names = meson_a1_phy_names, .num_phys = ARRAY_SIZE(meson_a1_phy_names), .setup_regmaps = dwc3_meson_g12a_setup_regmaps, + .usb2_init_phy = dwc3_meson_g12a_usb2_init_phy, + .set_phy_mode = dwc3_meson_g12a_set_phy_mode, }; struct dwc3_meson_g12a { @@ -175,8 +189,8 @@ struct dwc3_meson_g12a { const struct dwc3_meson_g12a_drvdata *drvdata; }; -static void dwc3_meson_g12a_usb2_set_mode(struct dwc3_meson_g12a *priv, - int i, enum phy_mode mode) +static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv, + int i, enum phy_mode mode) { if (mode == PHY_MODE_USB_HOST) regmap_update_bits(priv->u2p_regmap[i], U2P_R0, @@ -185,11 +199,41 @@ static void dwc3_meson_g12a_usb2_set_mode(struct dwc3_meson_g12a *priv, else regmap_update_bits(priv->u2p_regmap[i], U2P_R0, U2P_R0_HOST_DEVICE, 0); + + return 0; +} + +static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i, + enum phy_mode mode) +{ + int ret; + + regmap_update_bits(priv->u2p_regmap[i], U2P_R0, + U2P_R0_POWER_ON_RESET, + U2P_R0_POWER_ON_RESET); + + if (priv->drvdata->otg_switch_supported && i == USB2_OTG_PHY) { + regmap_update_bits(priv->u2p_regmap[i], U2P_R0, + U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS, + U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS); + + ret = priv->drvdata->set_phy_mode(priv, i, mode); + } else + ret = priv->drvdata->set_phy_mode(priv, i, + PHY_MODE_USB_HOST); + + if (ret) + return ret; + + regmap_update_bits(priv->u2p_regmap[i], U2P_R0, + U2P_R0_POWER_ON_RESET, 0); + + return 0; } static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv) { - int i; + int i, ret; if (priv->otg_mode == USB_DR_MODE_PERIPHERAL) priv->otg_phy_mode = PHY_MODE_USB_DEVICE; @@ -203,23 +247,9 @@ static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv) if (!strstr(priv->drvdata->phy_names[i], "usb2")) continue; - regmap_update_bits(priv->u2p_regmap[i], U2P_R0, - U2P_R0_POWER_ON_RESET, - U2P_R0_POWER_ON_RESET); - - if (priv->drvdata->otg_switch_supported && i == USB2_OTG_PHY) { - regmap_update_bits(priv->u2p_regmap[i], U2P_R0, - U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS, - U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS); - - dwc3_meson_g12a_usb2_set_mode(priv, i, - priv->otg_phy_mode); - } else - dwc3_meson_g12a_usb2_set_mode(priv, i, - PHY_MODE_USB_HOST); - - regmap_update_bits(priv->u2p_regmap[i], U2P_R0, - U2P_R0_POWER_ON_RESET, 0); + ret = priv->drvdata->usb2_init_phy(priv, i, priv->otg_phy_mode); + if (ret) + return ret; } return 0; @@ -372,7 +402,9 @@ static int dwc3_meson_g12a_otg_mode_set(struct dwc3_meson_g12a *priv, priv->otg_phy_mode = mode; - dwc3_meson_g12a_usb2_set_mode(priv, USB2_OTG_PHY, mode); + ret = priv->drvdata->set_phy_mode(priv, USB2_OTG_PHY, mode); + if (ret) + return ret; dwc3_meson_g12a_usb_otg_apply_mode(priv); -- cgit v1.2.3 From 8cc6d55bc20016cc6d81628713114bd807a1e661 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Sun, 29 Mar 2020 17:09:59 -0700 Subject: usb: dwc3: drd: Don't free non-existing irq If the driver is configured to use DRD role-switch, it's not OTG. There won't be OTG irq to free. Check for dwc->otg_irq before freeing it. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/drd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c index 7db1ffc92bbd..a24c6c038ad7 100644 --- a/drivers/usb/dwc3/drd.c +++ b/drivers/usb/dwc3/drd.c @@ -653,6 +653,6 @@ void dwc3_drd_exit(struct dwc3 *dwc) break; } - if (!dwc->edev) + if (dwc->otg_irq) free_irq(dwc->otg_irq, dwc); } -- cgit v1.2.3 From 8bb14308a86970a2321ac7d0e28ea0f1f1e744b0 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Sun, 29 Mar 2020 17:10:05 -0700 Subject: usb: dwc3: core: Use role-switch default dr_mode If the driver is configured to use DRD role-switch, let the drd code path decide the default dr_mode. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 7046c681fece..ab6323b8e323 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -85,6 +85,8 @@ static int dwc3_get_dr_mode(struct dwc3 *dwc) * specified or set to OTG, then set the mode to peripheral. */ if (mode == USB_DR_MODE_OTG && + (!IS_ENABLED(CONFIG_USB_ROLE_SWITCH) || + !device_property_read_bool(dwc->dev, "usb-role-switch")) && dwc->revision >= DWC3_REVISION_330A) mode = USB_DR_MODE_PERIPHERAL; } -- cgit v1.2.3 From 8d99087c2db863c5fa3a4a1f3cb82b3a493705ca Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Sun, 29 Mar 2020 16:12:57 -0700 Subject: usb: dwc3: gadget: Properly handle failed kick_transfer If dwc3 fails to issue START_TRANSFER/UPDATE_TRANSFER command, then we should properly end an active transfer and give back all the started requests. However if it's for an isoc endpoint, the failure maybe due to bus-expiry status. In this case, don't give back the requests and wait for the next retry. Fixes: 72246da40f37 ("usb: Introduce DesignWare USB3 DRD Driver") Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 58a05c59ab3f..23228500b706 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1220,6 +1220,8 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep) } } +static void dwc3_gadget_ep_cleanup_cancelled_requests(struct dwc3_ep *dep); + static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep) { struct dwc3_gadget_ep_cmd_params params; @@ -1259,14 +1261,20 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep) ret = dwc3_send_gadget_ep_cmd(dep, cmd, ¶ms); if (ret < 0) { - /* - * FIXME we need to iterate over the list of requests - * here and stop, unmap, free and del each of the linked - * requests instead of what we do now. - */ - if (req->trb) - memset(req->trb, 0, sizeof(struct dwc3_trb)); - dwc3_gadget_del_and_unmap_request(dep, req, ret); + struct dwc3_request *tmp; + + if (ret == -EAGAIN) + return ret; + + dwc3_stop_active_transfer(dep, true, true); + + list_for_each_entry_safe(req, tmp, &dep->started_list, list) + dwc3_gadget_move_cancelled_request(req); + + /* If ep isn't started, then there's no end transfer pending */ + if (!(dep->flags & DWC3_EP_END_TRANSFER_PENDING)) + dwc3_gadget_ep_cleanup_cancelled_requests(dep); + return ret; } -- cgit v1.2.3 From 9bc3395c24962e8c8e4f590ca2740c56e4a7a4fe Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Sun, 29 Mar 2020 16:13:04 -0700 Subject: usb: dwc3: gadget: Store resource index of start cmd As long as the START_TRANSFER command completes, it provides the resource index of the endpoint. Use this when we need to issue END_TRANSFER command to an isoc endpoint to retry with a new XferNotReady event. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 23228500b706..a6aebe55db4a 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -387,9 +387,12 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd, trace_dwc3_gadget_ep_cmd(dep, cmd, params, cmd_status); - if (ret == 0 && DWC3_DEPCMD_CMD(cmd) == DWC3_DEPCMD_STARTTRANSFER) { - dep->flags |= DWC3_EP_TRANSFER_STARTED; - dwc3_gadget_ep_get_transfer_index(dep); + if (DWC3_DEPCMD_CMD(cmd) == DWC3_DEPCMD_STARTTRANSFER) { + if (ret == 0) + dep->flags |= DWC3_EP_TRANSFER_STARTED; + + if (ret != -ETIMEDOUT) + dwc3_gadget_ep_get_transfer_index(dep); } if (saved_config) { -- cgit v1.2.3 From 36f05d36b03523da906cf2ae70ec31af6f57e94c Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Sun, 29 Mar 2020 16:13:10 -0700 Subject: usb: dwc3: gadget: Issue END_TRANSFER to retry isoc transfer After a number of unsuccessful start isoc attempts due to bus-expiry status, issue END_TRANSFER command and retry on the next XferNotReady event. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index a6aebe55db4a..dc03c04677b2 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1413,7 +1413,8 @@ static int __dwc3_gadget_start_isoc(struct dwc3_ep *dep) int ret; int i; - if (list_empty(&dep->pending_list)) { + if (list_empty(&dep->pending_list) && + list_empty(&dep->started_list)) { dep->flags |= DWC3_EP_PENDING_REQUEST; return -EAGAIN; } @@ -1436,6 +1437,27 @@ static int __dwc3_gadget_start_isoc(struct dwc3_ep *dep) break; } + /* + * After a number of unsuccessful start attempts due to bus-expiry + * status, issue END_TRANSFER command and retry on the next XferNotReady + * event. + */ + if (ret == -EAGAIN) { + struct dwc3_gadget_ep_cmd_params params; + u32 cmd; + + cmd = DWC3_DEPCMD_ENDTRANSFER | + DWC3_DEPCMD_CMDIOC | + DWC3_DEPCMD_PARAM(dep->resource_index); + + dep->resource_index = 0; + memset(¶ms, 0, sizeof(params)); + + ret = dwc3_send_gadget_ep_cmd(dep, cmd, ¶ms); + if (!ret) + dep->flags |= DWC3_EP_END_TRANSFER_PENDING; + } + return ret; } @@ -2663,6 +2685,18 @@ static void dwc3_gadget_endpoint_transfer_not_ready(struct dwc3_ep *dep, const struct dwc3_event_depevt *event) { dwc3_gadget_endpoint_frame_from_event(dep, event); + + /* + * The XferNotReady event is generated only once before the endpoint + * starts. It will be generated again when END_TRANSFER command is + * issued. For some controller versions, the XferNotReady event may be + * generated while the END_TRANSFER command is still in process. Ignore + * it and wait for the next XferNotReady event after the command is + * completed. + */ + if (dep->flags & DWC3_EP_END_TRANSFER_PENDING) + return; + (void) __dwc3_gadget_start_isoc(dep); } -- cgit v1.2.3 From f7ac582effc6ee416eb51e0c3e55836aaf7231ac Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Sun, 29 Mar 2020 16:13:16 -0700 Subject: usb: dwc3: gadget: WARN on no-resource status If the driver issued START_TRANSFER and received a no-resource status, then generally there are a few reasons for this: 1) The driver did not allocate resource for the endpoint during power-on-reset initialization. 2) The transfer resource was reset. At this moment, we don't do this in the driver, but it occurs when the driver issues START_CONFIG cmd to ep0 with resource index=2. 3) The driver issues the START_TRANSFER command to an already started endpoint. Usually, this is because the END_TRANSFER command hasn't completed yet. Print out a warning to help debug this issue in the driver. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index dc03c04677b2..a0555252dee0 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -356,6 +356,8 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd, ret = 0; break; case DEPEVT_TRANSFER_NO_RESOURCE: + dev_WARN(dwc->dev, "No resource for %s\n", + dep->name); ret = -EINVAL; break; case DEPEVT_TRANSFER_BUS_EXPIRY: -- cgit v1.2.3 From d9feef974e0d8cb6842533c92476a1b32a41ba31 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 31 Mar 2020 01:40:42 -0700 Subject: usb: dwc3: gadget: Continue to process pending requests If there are still pending requests because no TRB was available, prepare more when started requests are completed. Introduce dwc3_gadget_ep_should_continue() to check for incomplete and pending requests to resume updating new TRBs to the controller's TRB cache. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index a0555252dee0..20b593ea140f 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2600,10 +2600,8 @@ static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep, req->request.actual = req->request.length - req->remaining; - if (!dwc3_gadget_ep_request_completed(req)) { - __dwc3_gadget_kick_transfer(dep); + if (!dwc3_gadget_ep_request_completed(req)) goto out; - } dwc3_gadget_giveback(dep, req, status); @@ -2627,6 +2625,24 @@ static void dwc3_gadget_ep_cleanup_completed_requests(struct dwc3_ep *dep, } } +static bool dwc3_gadget_ep_should_continue(struct dwc3_ep *dep) +{ + struct dwc3_request *req; + + if (!list_empty(&dep->pending_list)) + return true; + + /* + * We only need to check the first entry of the started list. We can + * assume the completed requests are removed from the started list. + */ + req = next_request(&dep->started_list); + if (!req) + return false; + + return !dwc3_gadget_ep_request_completed(req); +} + static void dwc3_gadget_endpoint_frame_from_event(struct dwc3_ep *dep, const struct dwc3_event_depevt *event) { @@ -2656,6 +2672,8 @@ static void dwc3_gadget_endpoint_transfer_in_progress(struct dwc3_ep *dep, if (stop) dwc3_stop_active_transfer(dep, true, true); + else if (dwc3_gadget_ep_should_continue(dep)) + __dwc3_gadget_kick_transfer(dep); /* * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround. -- cgit v1.2.3 From 5b0ba0caaf3acc2665e58184349447eaa47bf3d5 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 16 Apr 2020 14:19:03 +0200 Subject: usb: dwc3: meson-g12a: refactor usb init Refactor the USB init code patch to handle the Amlogic GXL/GXM needing to initialize the OTG port as Peripheral mode for the DWC2 IP to probe correctly. A secondary, post_init callback is added to setup the OTG PHY mode after powering up the PHYs and before probing the DWC2 and DWC3 controllers. Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-meson-g12a.c | 52 +++++++++++++++++++++++++++----------- 1 file changed, 37 insertions(+), 15 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index 7027ee2ee4ab..e7a6d05f2a72 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -140,6 +140,8 @@ struct dwc3_meson_g12a_drvdata { enum phy_mode mode); int (*set_phy_mode)(struct dwc3_meson_g12a *priv, int i, enum phy_mode mode); + int (*usb_init)(struct dwc3_meson_g12a *priv); + int (*usb_post_init)(struct dwc3_meson_g12a *priv); }; static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv, @@ -151,6 +153,8 @@ static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i, static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv, int i, enum phy_mode mode); +static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv); + static struct dwc3_meson_g12a_drvdata g12a_drvdata = { .otg_switch_supported = true, .clks = meson_g12a_clocks, @@ -160,6 +164,7 @@ static struct dwc3_meson_g12a_drvdata g12a_drvdata = { .setup_regmaps = dwc3_meson_g12a_setup_regmaps, .usb2_init_phy = dwc3_meson_g12a_usb2_init_phy, .set_phy_mode = dwc3_meson_g12a_set_phy_mode, + .usb_init = dwc3_meson_g12a_usb_init, }; static struct dwc3_meson_g12a_drvdata a1_drvdata = { @@ -171,6 +176,7 @@ static struct dwc3_meson_g12a_drvdata a1_drvdata = { .setup_regmaps = dwc3_meson_g12a_setup_regmaps, .usb2_init_phy = dwc3_meson_g12a_usb2_init_phy, .set_phy_mode = dwc3_meson_g12a_set_phy_mode, + .usb_init = dwc3_meson_g12a_usb_init, }; struct dwc3_meson_g12a { @@ -231,15 +237,11 @@ static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i, return 0; } -static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv) +static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv, + enum phy_mode mode) { int i, ret; - if (priv->otg_mode == USB_DR_MODE_PERIPHERAL) - priv->otg_phy_mode = PHY_MODE_USB_DEVICE; - else - priv->otg_phy_mode = PHY_MODE_USB_HOST; - for (i = 0; i < priv->drvdata->num_phys; ++i) { if (!priv->phys[i]) continue; @@ -247,7 +249,7 @@ static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv) if (!strstr(priv->drvdata->phy_names[i], "usb2")) continue; - ret = priv->drvdata->usb2_init_phy(priv, i, priv->otg_phy_mode); + ret = priv->drvdata->usb2_init_phy(priv, i, mode); if (ret) return ret; } @@ -284,9 +286,10 @@ static void dwc3_meson_g12a_usb3_init(struct dwc3_meson_g12a *priv) FIELD_PREP(USB_R1_P30_PCS_TX_SWING_FULL_MASK, 127)); } -static void dwc3_meson_g12a_usb_otg_apply_mode(struct dwc3_meson_g12a *priv) +static void dwc3_meson_g12a_usb_otg_apply_mode(struct dwc3_meson_g12a *priv, + enum phy_mode mode) { - if (priv->otg_phy_mode == PHY_MODE_USB_DEVICE) { + if (mode == PHY_MODE_USB_DEVICE) { regmap_update_bits(priv->usb_glue_regmap, USB_R0, USB_R0_U2D_ACT, USB_R0_U2D_ACT); regmap_update_bits(priv->usb_glue_regmap, USB_R0, @@ -301,11 +304,12 @@ static void dwc3_meson_g12a_usb_otg_apply_mode(struct dwc3_meson_g12a *priv) } } -static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv) +static int dwc3_meson_g12a_usb_init_glue(struct dwc3_meson_g12a *priv, + enum phy_mode mode) { int ret; - ret = dwc3_meson_g12a_usb2_init(priv); + ret = dwc3_meson_g12a_usb2_init(priv, mode); if (ret) return ret; @@ -327,7 +331,7 @@ static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv) if (priv->usb3_ports) dwc3_meson_g12a_usb3_init(priv); - dwc3_meson_g12a_usb_otg_apply_mode(priv); + dwc3_meson_g12a_usb_otg_apply_mode(priv, mode); return 0; } @@ -406,7 +410,7 @@ static int dwc3_meson_g12a_otg_mode_set(struct dwc3_meson_g12a *priv, if (ret) return ret; - dwc3_meson_g12a_usb_otg_apply_mode(priv); + dwc3_meson_g12a_usb_otg_apply_mode(priv, mode); return 0; } @@ -555,6 +559,11 @@ static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv, return 0; } +static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv) +{ + return dwc3_meson_g12a_usb_init_glue(priv, priv->otg_phy_mode); +} + static int dwc3_meson_g12a_probe(struct platform_device *pdev) { struct dwc3_meson_g12a *priv; @@ -622,7 +631,12 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) /* Get dr_mode */ priv->otg_mode = usb_get_dr_mode(dev); - ret = dwc3_meson_g12a_usb_init(priv); + if (priv->otg_mode == USB_DR_MODE_PERIPHERAL) + priv->otg_phy_mode = PHY_MODE_USB_DEVICE; + else + priv->otg_phy_mode = PHY_MODE_USB_HOST; + + ret = priv->drvdata->usb_init(priv); if (ret) goto err_disable_clks; @@ -640,6 +654,12 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev) goto err_phys_exit; } + if (priv->drvdata->usb_post_init) { + ret = priv->drvdata->usb_post_init(priv); + if (ret) + goto err_phys_power; + } + ret = of_platform_populate(np, NULL, NULL, dev); if (ret) goto err_phys_power; @@ -741,7 +761,9 @@ static int __maybe_unused dwc3_meson_g12a_resume(struct device *dev) reset_control_deassert(priv->reset); - dwc3_meson_g12a_usb_init(priv); + ret = priv->drvdata->usb_init(priv); + if (ret) + return ret; /* Init PHYs */ for (i = 0 ; i < PHY_COUNT ; ++i) { -- cgit v1.2.3 From df7e374581515c10857d72c409cc8cac4021259b Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 16 Apr 2020 14:19:04 +0200 Subject: usb: dwc3: meson-g12a: support the GXL/GXM DWC3 host phy disconnect On the Amlogic GXL/GXM SoCs, the OTG PHY status signals are always connected to the DWC3 controller, thus crashing the controller when switching to OTG mode when port is not populated with a device/cable to Host. Amlogic added a bit to disconnect the OTG PHY status signals from the DWC3 to be used when switching the OTG PHY as Device to the DWC2 controller. The drawback is that it makes the DWC3 port state machine stall and needs a full reset of the DWC3 controller to get connect status to the port connected to the OTG PHY, but not the other one. Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-meson-g12a.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index e7a6d05f2a72..b4d728c4a051 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -131,6 +131,7 @@ struct dwc3_meson_g12a; struct dwc3_meson_g12a_drvdata { bool otg_switch_supported; + bool otg_phy_host_port_disable; struct clk_bulk_data *clks; int num_clks; const char **phy_names; @@ -155,6 +156,19 @@ static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv, static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv); +/* + * For GXL and GXM SoCs: + * USB Phy muxing between the DWC2 Device controller and the DWC3 Host + * controller is buggy when switching from Device to Host when USB port + * is unpopulated, it causes the DWC3 to hard crash. + * When populated (including OTG switching with ID pin), the switch works + * like a charm like on the G12A platforms. + * In order to still switch from Host to Device on an USB Type-A port, + * an U2_PORT_DISABLE bit has been added to disconnect the DWC3 Host + * controller from the port, but when used the DWC3 controller must be + * reset to recover usage of the port. + */ + static struct dwc3_meson_g12a_drvdata g12a_drvdata = { .otg_switch_supported = true, .clks = meson_g12a_clocks, @@ -290,6 +304,14 @@ static void dwc3_meson_g12a_usb_otg_apply_mode(struct dwc3_meson_g12a *priv, enum phy_mode mode) { if (mode == PHY_MODE_USB_DEVICE) { + if (priv->otg_mode != USB_DR_MODE_OTG && + priv->drvdata->otg_phy_host_port_disable) + /* Isolate the OTG PHY port from the Host Controller */ + regmap_update_bits(priv->usb_glue_regmap, USB_R1, + USB_R1_U3H_HOST_U2_PORT_DISABLE_MASK, + FIELD_PREP(USB_R1_U3H_HOST_U2_PORT_DISABLE_MASK, + BIT(USB2_OTG_PHY))); + regmap_update_bits(priv->usb_glue_regmap, USB_R0, USB_R0_U2D_ACT, USB_R0_U2D_ACT); regmap_update_bits(priv->usb_glue_regmap, USB_R0, @@ -297,6 +319,12 @@ static void dwc3_meson_g12a_usb_otg_apply_mode(struct dwc3_meson_g12a *priv, regmap_update_bits(priv->usb_glue_regmap, USB_R4, USB_R4_P21_SLEEP_M0, USB_R4_P21_SLEEP_M0); } else { + if (priv->otg_mode != USB_DR_MODE_OTG && + priv->drvdata->otg_phy_host_port_disable) { + regmap_update_bits(priv->usb_glue_regmap, USB_R1, + USB_R1_U3H_HOST_U2_PORT_DISABLE_MASK, 0); + msleep(500); + } regmap_update_bits(priv->usb_glue_regmap, USB_R0, USB_R0_U2D_ACT, 0); regmap_update_bits(priv->usb_glue_regmap, USB_R4, @@ -430,6 +458,13 @@ static int dwc3_meson_g12a_role_set(struct usb_role_switch *sw, if (mode == priv->otg_phy_mode) return 0; + if (priv->drvdata->otg_phy_host_port_disable) + dev_warn_once(priv->dev, "Manual OTG switch is broken on this "\ + "SoC, when manual switching from "\ + "Host to device, DWC3 controller "\ + "will need to be resetted in order "\ + "to recover usage of the Host port"); + return dwc3_meson_g12a_otg_mode_set(priv, mode); } -- cgit v1.2.3 From a9fc15e0fd78ac57535c2e4fcddfafd9df32e37a Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 16 Apr 2020 14:19:05 +0200 Subject: usb: dwc3: meson-g12a: add support for GXL and GXM SoCs In order to add support for the Amlogic GXL/GXM USB Glue, this adds the corresponding : - PHY names - clock names - USB2 PHY init and mode set - regmap setup Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-meson-g12a.c | 102 ++++++++++++++++++++++++++++++++++++- 1 file changed, 101 insertions(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index b4d728c4a051..bd744e82cad4 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -101,6 +101,11 @@ #define PHY_COUNT 3 #define USB2_OTG_PHY 1 +static struct clk_bulk_data meson_gxl_clocks[] = { + { .id = "usb_ctrl" }, + { .id = "ddr" }, +}; + static struct clk_bulk_data meson_g12a_clocks[] = { { .id = NULL }, }; @@ -111,6 +116,10 @@ static struct clk_bulk_data meson_a1_clocks[] = { { .id = "xtal_usb_ctrl" }, }; +static const char *meson_gxm_phy_names[] = { + "usb2-phy0", "usb2-phy1", "usb2-phy2", +}; + static const char *meson_g12a_phy_names[] = { "usb2-phy0", "usb2-phy1", "usb3-phy0", }; @@ -145,16 +154,25 @@ struct dwc3_meson_g12a_drvdata { int (*usb_post_init)(struct dwc3_meson_g12a *priv); }; +static int dwc3_meson_gxl_setup_regmaps(struct dwc3_meson_g12a *priv, + void __iomem *base); static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv, void __iomem *base); static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i, - enum phy_mode mode); + enum phy_mode mode); +static int dwc3_meson_gxl_usb2_init_phy(struct dwc3_meson_g12a *priv, int i, + enum phy_mode mode); static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv, int i, enum phy_mode mode); +static int dwc3_meson_gxl_set_phy_mode(struct dwc3_meson_g12a *priv, + int i, enum phy_mode mode); static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv); +static int dwc3_meson_gxl_usb_init(struct dwc3_meson_g12a *priv); + +static int dwc3_meson_gxl_usb_post_init(struct dwc3_meson_g12a *priv); /* * For GXL and GXM SoCs: @@ -169,6 +187,34 @@ static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv); * reset to recover usage of the port. */ +static struct dwc3_meson_g12a_drvdata gxl_drvdata = { + .otg_switch_supported = true, + .otg_phy_host_port_disable = true, + .clks = meson_gxl_clocks, + .num_clks = ARRAY_SIZE(meson_g12a_clocks), + .phy_names = meson_a1_phy_names, + .num_phys = ARRAY_SIZE(meson_a1_phy_names), + .setup_regmaps = dwc3_meson_gxl_setup_regmaps, + .usb2_init_phy = dwc3_meson_gxl_usb2_init_phy, + .set_phy_mode = dwc3_meson_gxl_set_phy_mode, + .usb_init = dwc3_meson_gxl_usb_init, + .usb_post_init = dwc3_meson_gxl_usb_post_init, +}; + +static struct dwc3_meson_g12a_drvdata gxm_drvdata = { + .otg_switch_supported = true, + .otg_phy_host_port_disable = true, + .clks = meson_gxl_clocks, + .num_clks = ARRAY_SIZE(meson_g12a_clocks), + .phy_names = meson_gxm_phy_names, + .num_phys = ARRAY_SIZE(meson_gxm_phy_names), + .setup_regmaps = dwc3_meson_gxl_setup_regmaps, + .usb2_init_phy = dwc3_meson_gxl_usb2_init_phy, + .set_phy_mode = dwc3_meson_gxl_set_phy_mode, + .usb_init = dwc3_meson_gxl_usb_init, + .usb_post_init = dwc3_meson_gxl_usb_post_init, +}; + static struct dwc3_meson_g12a_drvdata g12a_drvdata = { .otg_switch_supported = true, .clks = meson_g12a_clocks, @@ -209,6 +255,21 @@ struct dwc3_meson_g12a { const struct dwc3_meson_g12a_drvdata *drvdata; }; +static int dwc3_meson_gxl_set_phy_mode(struct dwc3_meson_g12a *priv, + int i, enum phy_mode mode) +{ + return phy_set_mode(priv->phys[i], mode); +} + +static int dwc3_meson_gxl_usb2_init_phy(struct dwc3_meson_g12a *priv, int i, + enum phy_mode mode) +{ + /* On GXL PHY must be started in device mode for DWC2 init */ + return priv->drvdata->set_phy_mode(priv, i, + (i == USB2_OTG_PHY) ? PHY_MODE_USB_DEVICE + : PHY_MODE_USB_HOST); +} + static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv, int i, enum phy_mode mode) { @@ -559,6 +620,18 @@ static int dwc3_meson_g12a_otg_init(struct platform_device *pdev, return 0; } +static int dwc3_meson_gxl_setup_regmaps(struct dwc3_meson_g12a *priv, + void __iomem *base) +{ + /* GXL controls the PHY mode in the PHY registers unlike G12A */ + priv->usb_glue_regmap = devm_regmap_init_mmio(priv->dev, base, + &phy_meson_g12a_usb_glue_regmap_conf); + if (IS_ERR(priv->usb_glue_regmap)) + return PTR_ERR(priv->usb_glue_regmap); + + return 0; +} + static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv, void __iomem *base) { @@ -599,6 +672,25 @@ static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv) return dwc3_meson_g12a_usb_init_glue(priv, priv->otg_phy_mode); } +static int dwc3_meson_gxl_usb_init(struct dwc3_meson_g12a *priv) +{ + return dwc3_meson_g12a_usb_init_glue(priv, PHY_MODE_USB_DEVICE); +} + +static int dwc3_meson_gxl_usb_post_init(struct dwc3_meson_g12a *priv) +{ + int ret; + + ret = priv->drvdata->set_phy_mode(priv, USB2_OTG_PHY, + priv->otg_phy_mode); + if (ret) + return ret; + + dwc3_meson_g12a_usb_otg_apply_mode(priv, priv->otg_phy_mode); + + return 0; +} + static int dwc3_meson_g12a_probe(struct platform_device *pdev) { struct dwc3_meson_g12a *priv; @@ -830,6 +922,14 @@ static const struct dev_pm_ops dwc3_meson_g12a_dev_pm_ops = { }; static const struct of_device_id dwc3_meson_g12a_match[] = { + { + .compatible = "amlogic,meson-gxl-usb-ctrl", + .data = &gxl_drvdata, + }, + { + .compatible = "amlogic,meson-gxm-usb-ctrl", + .data = &gxm_drvdata, + }, { .compatible = "amlogic,meson-g12a-usb-ctrl", .data = &g12a_drvdata, -- cgit v1.2.3 From f4cc91ddd856e51c3a234f958c80fe8f3409e850 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 16 Apr 2020 14:19:08 +0200 Subject: usb: dwc3: of-simple: remove Amlogic GXL and AXG compatibles There is now a dedicated driver for these SoCs making the old compatible obsolete. Signed-off-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-of-simple.c | 30 ++++++------------------------ 1 file changed, 6 insertions(+), 24 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c index e64754be47b4..8852fbfdead4 100644 --- a/drivers/usb/dwc3/dwc3-of-simple.c +++ b/drivers/usb/dwc3/dwc3-of-simple.c @@ -27,7 +27,6 @@ struct dwc3_of_simple { struct clk_bulk_data *clks; int num_clocks; struct reset_control *resets; - bool pulse_resets; bool need_reset; }; @@ -38,7 +37,6 @@ static int dwc3_of_simple_probe(struct platform_device *pdev) struct device_node *np = dev->of_node; int ret; - bool shared_resets = false; simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL); if (!simple) @@ -54,13 +52,7 @@ static int dwc3_of_simple_probe(struct platform_device *pdev) if (of_device_is_compatible(np, "rockchip,rk3399-dwc3")) simple->need_reset = true; - if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") || - of_device_is_compatible(np, "amlogic,meson-gxl-dwc3")) { - shared_resets = true; - simple->pulse_resets = true; - } - - simple->resets = of_reset_control_array_get(np, shared_resets, true, + simple->resets = of_reset_control_array_get(np, false, true, true); if (IS_ERR(simple->resets)) { ret = PTR_ERR(simple->resets); @@ -68,15 +60,9 @@ static int dwc3_of_simple_probe(struct platform_device *pdev) return ret; } - if (simple->pulse_resets) { - ret = reset_control_reset(simple->resets); - if (ret) - goto err_resetc_put; - } else { - ret = reset_control_deassert(simple->resets); - if (ret) - goto err_resetc_put; - } + ret = reset_control_deassert(simple->resets); + if (ret) + goto err_resetc_put; ret = clk_bulk_get_all(simple->dev, &simple->clks); if (ret < 0) @@ -102,8 +88,7 @@ err_clk_put: clk_bulk_put_all(simple->num_clocks, simple->clks); err_resetc_assert: - if (!simple->pulse_resets) - reset_control_assert(simple->resets); + reset_control_assert(simple->resets); err_resetc_put: reset_control_put(simple->resets); @@ -118,8 +103,7 @@ static void __dwc3_of_simple_teardown(struct dwc3_of_simple *simple) clk_bulk_put_all(simple->num_clocks, simple->clks); simple->num_clocks = 0; - if (!simple->pulse_resets) - reset_control_assert(simple->resets); + reset_control_assert(simple->resets); reset_control_put(simple->resets); @@ -191,8 +175,6 @@ static const struct of_device_id of_dwc3_simple_match[] = { { .compatible = "xlnx,zynqmp-dwc3" }, { .compatible = "cavium,octeon-7130-usb-uctl" }, { .compatible = "sprd,sc9860-dwc3" }, - { .compatible = "amlogic,meson-axg-dwc3" }, - { .compatible = "amlogic,meson-gxl-dwc3" }, { .compatible = "allwinner,sun50i-h6-dwc3" }, { /* Sentinel */ } }; -- cgit v1.2.3 From c685114f63b1e5eae598855ada597321c3e80547 Mon Sep 17 00:00:00 2001 From: Jason Yan Date: Sun, 26 Apr 2020 17:41:56 +0800 Subject: usb: dwc3: use true,false for dwc->otg_restart_host Fix the following coccicheck warning: drivers/usb/dwc3/drd.c:85:3-24: WARNING: Assignment of 0/1 to bool variable drivers/usb/dwc3/drd.c:59:2-23: WARNING: Assignment of 0/1 to bool variable Signed-off-by: Jason Yan Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/drd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c index a24c6c038ad7..2e483448d695 100644 --- a/drivers/usb/dwc3/drd.c +++ b/drivers/usb/dwc3/drd.c @@ -56,7 +56,7 @@ static irqreturn_t dwc3_otg_thread_irq(int irq, void *_dwc) spin_lock(&dwc->lock); if (dwc->otg_restart_host) { dwc3_otg_host_init(dwc); - dwc->otg_restart_host = 0; + dwc->otg_restart_host = false; } spin_unlock(&dwc->lock); @@ -82,7 +82,7 @@ static irqreturn_t dwc3_otg_irq(int irq, void *_dwc) if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST && !(reg & DWC3_OEVT_DEVICEMODE)) - dwc->otg_restart_host = 1; + dwc->otg_restart_host = true; dwc3_writel(dwc->regs, DWC3_OEVT, reg); ret = IRQ_WAKE_THREAD; } -- cgit v1.2.3 From 9af21dd6faeba593fb47f5cceaf69b1e5a3ff95f Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Sat, 11 Apr 2020 19:20:01 -0700 Subject: usb: dwc3: Add support for DWC_usb32 IP Synopsys introduces a new controller DWC_usb32. It supports dual-lane and speed up to 20 Gbps, and the DWC3 driver will drive this controller. Currently the driver uses a single field dwc->revision to ID both DWC_usb3 and DWC_usb31 and their version number. This was sufficient for two IPs, but this method doesn't work with additional IPs. As a result, let's separate the dwc->revision field to 2 separate fields: ip and revision. The ip field now stores the ID of the controller's IP while the revision field stores the controller's version number. This new scheme enforces DWC3 to compare the revision within the same IP only. As a result, we must update all the revision check of the controller to check its corresponding IP. To help with this enforcement, we create a few macros to help with the common version checks: DWC3_IP_IS(IP) DWC3_VER_IS(IP, VERSION) DWC3_VER_IS_PRIOR(IP, VERSION) DWC3_VER_IS_WITHIN(IP, LOWER_VERSION, UPPER_VERSION) DWC3_VER_TYPE_IS_WITHIN(IP, VERSION, LOWER_VERSION_TYPE, UPPER_VERSION_TYPE) The DWC_usb32 controller operates using the same programming model and with very similar configurations as its previous controllers. Please note that the various IP and revision checks in this patch match the current checks for DWC_usb31 version 1.90a. Additional configurations that are unique to DWC_usb32 are applied separately. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.c | 49 ++++++++++++++---------------- drivers/usb/dwc3/core.h | 66 ++++++++++++++++++++++------------------ drivers/usb/dwc3/gadget.c | 77 +++++++++++++++++++++++------------------------ drivers/usb/dwc3/host.c | 2 +- 4 files changed, 97 insertions(+), 97 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index ab6323b8e323..25c686a752b0 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -87,7 +87,7 @@ static int dwc3_get_dr_mode(struct dwc3 *dwc) if (mode == USB_DR_MODE_OTG && (!IS_ENABLED(CONFIG_USB_ROLE_SWITCH) || !device_property_read_bool(dwc->dev, "usb-role-switch")) && - dwc->revision >= DWC3_REVISION_330A) + !DWC3_VER_IS_PRIOR(DWC3, 330A)) mode = USB_DR_MODE_PERIPHERAL; } @@ -264,7 +264,7 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc) * take a little more than 50ms. Set the polling rate at 20ms * for 10 times instead. */ - if (dwc3_is_usb31(dwc) && dwc->revision >= DWC3_USB31_REVISION_190A) + if (DWC3_VER_IS_WITHIN(DWC31, 190A, ANY) || DWC3_IP_IS(DWC32)) retries = 10; do { @@ -272,8 +272,7 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc) if (!(reg & DWC3_DCTL_CSFTRST)) goto done; - if (dwc3_is_usb31(dwc) && - dwc->revision >= DWC3_USB31_REVISION_190A) + if (DWC3_VER_IS_WITHIN(DWC31, 190A, ANY) || DWC3_IP_IS(DWC32)) msleep(20); else udelay(1); @@ -290,7 +289,7 @@ done: * is cleared, we must wait at least 50ms before accessing the PHY * domain (synchronization delay). */ - if (dwc3_is_usb31(dwc) && dwc->revision <= DWC3_USB31_REVISION_180A) + if (DWC3_VER_IS_WITHIN(DWC31, ANY, 180A)) msleep(50); return 0; @@ -305,7 +304,7 @@ static void dwc3_frame_length_adjustment(struct dwc3 *dwc) u32 reg; u32 dft; - if (dwc->revision < DWC3_REVISION_250A) + if (DWC3_VER_IS_PRIOR(DWC3, 250A)) return; if (dwc->fladj == 0) @@ -586,7 +585,7 @@ static int dwc3_phy_setup(struct dwc3 *dwc) * will be '0' when the core is reset. Application needs to set it * to '1' after the core initialization is completed. */ - if (dwc->revision > DWC3_REVISION_194A) + if (!DWC3_VER_IS_WITHIN(DWC3, ANY, 194A)) reg |= DWC3_GUSB3PIPECTL_SUSPHY; /* @@ -677,7 +676,7 @@ static int dwc3_phy_setup(struct dwc3 *dwc) * be '0' when the core is reset. Application needs to set it to * '1' after the core initialization is completed. */ - if (dwc->revision > DWC3_REVISION_194A) + if (!DWC3_VER_IS_WITHIN(DWC3, ANY, 194A)) reg |= DWC3_GUSB2PHYCFG_SUSPHY; /* @@ -726,15 +725,13 @@ static bool dwc3_core_is_valid(struct dwc3 *dwc) u32 reg; reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); + dwc->ip = DWC3_GSNPS_ID(reg); /* This should read as U3 followed by revision number */ - if ((reg & DWC3_GSNPSID_MASK) == 0x55330000) { - /* Detected DWC_usb3 IP */ + if (DWC3_IP_IS(DWC3)) { dwc->revision = reg; - } else if ((reg & DWC3_GSNPSID_MASK) == 0x33310000) { - /* Detected DWC_usb31 IP */ + } else if (DWC3_IP_IS(DWC31) || DWC3_IP_IS(DWC32)) { dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); - dwc->revision |= DWC3_REVISION_IS_DWC31; dwc->version_type = dwc3_readl(dwc->regs, DWC3_VER_TYPE); } else { return false; @@ -767,8 +764,7 @@ static void dwc3_core_setup_global_control(struct dwc3 *dwc) */ if ((dwc->dr_mode == USB_DR_MODE_HOST || dwc->dr_mode == USB_DR_MODE_OTG) && - (dwc->revision >= DWC3_REVISION_210A && - dwc->revision <= DWC3_REVISION_250A)) + DWC3_VER_IS_WITHIN(DWC3, 210A, 250A)) reg |= DWC3_GCTL_DSBLCLKGTNG | DWC3_GCTL_SOFITPSYNC; else reg &= ~DWC3_GCTL_DSBLCLKGTNG; @@ -811,7 +807,7 @@ static void dwc3_core_setup_global_control(struct dwc3 *dwc) * and falls back to high-speed mode which causes * the device to enter a Connect/Disconnect loop */ - if (dwc->revision < DWC3_REVISION_190A) + if (DWC3_VER_IS_PRIOR(DWC3, 190A)) reg |= DWC3_GCTL_U2RSTECN; dwc3_writel(dwc->regs, DWC3_GCTL, reg); @@ -964,7 +960,7 @@ static int dwc3_core_init(struct dwc3 *dwc) goto err0a; if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD && - dwc->revision > DWC3_REVISION_194A) { + !DWC3_VER_IS_WITHIN(DWC3, ANY, 194A)) { if (!dwc->dis_u3_susphy_quirk) { reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); reg |= DWC3_GUSB3PIPECTL_SUSPHY; @@ -1011,20 +1007,20 @@ static int dwc3_core_init(struct dwc3 *dwc) * the DWC_usb3 controller. It is NOT available in the * DWC_usb31 controller. */ - if (!dwc3_is_usb31(dwc) && dwc->revision >= DWC3_REVISION_310A) { + if (DWC3_VER_IS_WITHIN(DWC3, 310A, ANY)) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); reg |= DWC3_GUCTL2_RST_ACTBITLATER; dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); } - if (dwc->revision >= DWC3_REVISION_250A) { + if (!DWC3_VER_IS_PRIOR(DWC3, 250A)) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); /* * Enable hardware control of sending remote wakeup * in HS when the device is in the L1 state. */ - if (dwc->revision >= DWC3_REVISION_290A) + if (!DWC3_VER_IS_PRIOR(DWC3, 290A)) reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; if (dwc->dis_tx_ipgap_linecheck_quirk) @@ -1056,7 +1052,7 @@ static int dwc3_core_init(struct dwc3 *dwc) * Must config both number of packets and max burst settings to enable * RX and/or TX threshold. */ - if (dwc3_is_usb31(dwc) && dwc->dr_mode == USB_DR_MODE_HOST) { + if (!DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) { u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; u8 rx_maxburst = dwc->rx_max_burst_prd; u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; @@ -1378,10 +1374,9 @@ static void dwc3_get_properties(struct dwc3 *dwc) /* check whether the core supports IMOD */ bool dwc3_has_imod(struct dwc3 *dwc) { - return ((dwc3_is_usb3(dwc) && - dwc->revision >= DWC3_REVISION_300A) || - (dwc3_is_usb31(dwc) && - dwc->revision >= DWC3_USB31_REVISION_120A)); + return DWC3_VER_IS_WITHIN(DWC3, 300A, ANY) || + DWC3_VER_IS_WITHIN(DWC31, 120A, ANY) || + DWC3_IP_IS(DWC32); } static void dwc3_check_params(struct dwc3 *dwc) @@ -1402,7 +1397,7 @@ static void dwc3_check_params(struct dwc3 *dwc) * affected version. */ if (!dwc->imod_interval && - (dwc->revision == DWC3_REVISION_300A)) + DWC3_VER_IS(DWC3, 300A)) dwc->imod_interval = 1; /* Check the maximum_speed parameter */ @@ -1424,7 +1419,7 @@ static void dwc3_check_params(struct dwc3 *dwc) /* * default to superspeed plus if we are capable. */ - if (dwc3_is_usb31(dwc) && + if ((DWC3_IP_IS(DWC31) || DWC3_IP_IS(DWC32)) && (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == DWC3_GHWPARAMS3_SSPHY_IFC_GEN2)) dwc->maximum_speed = USB_SPEED_SUPER_PLUS; diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index e054a79024c7..b2903492437a 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -69,6 +69,7 @@ #define DWC3_GEVNTCOUNT_EHB BIT(31) #define DWC3_GSNPSID_MASK 0xffff0000 #define DWC3_GSNPSREV_MASK 0xffff +#define DWC3_GSNPS_ID(p) (((p) & DWC3_GSNPSID_MASK) >> 16) /* DWC3 registers memory space boundries */ #define DWC3_XHCI_REGS_START 0x0 @@ -949,7 +950,8 @@ struct dwc3_scratchpad_array { * @nr_scratch: number of scratch buffers * @u1u2: only used on revisions <1.83a for workaround * @maximum_speed: maximum speed requested (mainly for testing purposes) - * @revision: revision register contents + * @ip: controller's ID + * @revision: controller's version of an IP * @version_type: VERSIONTYPE register contents, a sub release of a revision * @dr_mode: requested mode of operation * @current_dr_role: current role of operation when in dual-role mode @@ -1110,15 +1112,15 @@ struct dwc3 { u32 u1u2; u32 maximum_speed; - /* - * All 3.1 IP version constants are greater than the 3.0 IP - * version constants. This works for most version checks in - * dwc3. However, in the future, this may not apply as - * features may be developed on newer versions of the 3.0 IP - * that are not in the 3.1 IP. - */ + u32 ip; + +#define DWC3_IP 0x5533 +#define DWC31_IP 0x3331 +#define DWC32_IP 0x3332 + u32 revision; +#define DWC3_REVISION_ANY 0x0 #define DWC3_REVISION_173A 0x5533173a #define DWC3_REVISION_175A 0x5533175a #define DWC3_REVISION_180A 0x5533180a @@ -1143,20 +1145,17 @@ struct dwc3 { #define DWC3_REVISION_310A 0x5533310a #define DWC3_REVISION_330A 0x5533330a -/* - * NOTICE: we're using bit 31 as a "is usb 3.1" flag. This is really - * just so dwc31 revisions are always larger than dwc3. - */ -#define DWC3_REVISION_IS_DWC31 0x80000000 -#define DWC3_USB31_REVISION_110A (0x3131302a | DWC3_REVISION_IS_DWC31) -#define DWC3_USB31_REVISION_120A (0x3132302a | DWC3_REVISION_IS_DWC31) -#define DWC3_USB31_REVISION_160A (0x3136302a | DWC3_REVISION_IS_DWC31) -#define DWC3_USB31_REVISION_170A (0x3137302a | DWC3_REVISION_IS_DWC31) -#define DWC3_USB31_REVISION_180A (0x3138302a | DWC3_REVISION_IS_DWC31) -#define DWC3_USB31_REVISION_190A (0x3139302a | DWC3_REVISION_IS_DWC31) +#define DWC31_REVISION_ANY 0x0 +#define DWC31_REVISION_110A 0x3131302a +#define DWC31_REVISION_120A 0x3132302a +#define DWC31_REVISION_160A 0x3136302a +#define DWC31_REVISION_170A 0x3137302a +#define DWC31_REVISION_180A 0x3138302a +#define DWC31_REVISION_190A 0x3139302a u32 version_type; +#define DWC31_VERSIONTYPE_ANY 0x0 #define DWC31_VERSIONTYPE_EA01 0x65613031 #define DWC31_VERSIONTYPE_EA02 0x65613032 #define DWC31_VERSIONTYPE_EA03 0x65613033 @@ -1400,17 +1399,26 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode); void dwc3_set_mode(struct dwc3 *dwc, u32 mode); u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type); -/* check whether we are on the DWC_usb3 core */ -static inline bool dwc3_is_usb3(struct dwc3 *dwc) -{ - return !(dwc->revision & DWC3_REVISION_IS_DWC31); -} +#define DWC3_IP_IS(_ip) \ + (dwc->ip == _ip##_IP) -/* check whether we are on the DWC_usb31 core */ -static inline bool dwc3_is_usb31(struct dwc3 *dwc) -{ - return !!(dwc->revision & DWC3_REVISION_IS_DWC31); -} +#define DWC3_VER_IS(_ip, _ver) \ + (DWC3_IP_IS(_ip) && dwc->revision == _ip##_REVISION_##_ver) + +#define DWC3_VER_IS_PRIOR(_ip, _ver) \ + (DWC3_IP_IS(_ip) && dwc->revision < _ip##_REVISION_##_ver) + +#define DWC3_VER_IS_WITHIN(_ip, _from, _to) \ + (DWC3_IP_IS(_ip) && \ + dwc->revision >= _ip##_REVISION_##_from && \ + (!(_ip##_REVISION_##_to) || \ + dwc->revision <= _ip##_REVISION_##_to)) + +#define DWC3_VER_TYPE_IS_WITHIN(_ip, _ver, _from, _to) \ + (DWC3_VER_IS(_ip, _ver) && \ + dwc->version_type >= _ip##_VERSIONTYPE_##_from && \ + (!(_ip##_VERSIONTYPE_##_to) || \ + dwc->version_type <= _ip##_VERSIONTYPE_##_to)) bool dwc3_has_imod(struct dwc3 *dwc); diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 20b593ea140f..634c3ef00f21 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -95,7 +95,7 @@ int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state) * Wait until device controller is ready. Only applies to 1.94a and * later RTL. */ - if (dwc->revision >= DWC3_REVISION_194A) { + if (!DWC3_VER_IS_PRIOR(DWC3, 194A)) { while (--retries) { reg = dwc3_readl(dwc->regs, DWC3_DSTS); if (reg & DWC3_DSTS_DCNRD) @@ -122,7 +122,7 @@ int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state) * The following code is racy when called from dwc3_gadget_wakeup, * and is not needed, at least on newer versions */ - if (dwc->revision >= DWC3_REVISION_194A) + if (!DWC3_VER_IS_PRIOR(DWC3, 194A)) return 0; /* wait for a change in DSTS */ @@ -420,7 +420,8 @@ static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep) * IN transfers due to a mishandled error condition. Synopsys * STAR 9000614252. */ - if (dep->direction && (dwc->revision >= DWC3_REVISION_260A) && + if (dep->direction && + !DWC3_VER_IS_PRIOR(DWC3, 260A) && (dwc->gadget.speed >= USB_SPEED_SUPER)) cmd |= DWC3_DEPCMD_CLEARPENDIN; @@ -1421,12 +1422,9 @@ static int __dwc3_gadget_start_isoc(struct dwc3_ep *dep) return -EAGAIN; } - if (!dwc->dis_start_transfer_quirk && dwc3_is_usb31(dwc) && - (dwc->revision <= DWC3_USB31_REVISION_160A || - (dwc->revision == DWC3_USB31_REVISION_170A && - dwc->version_type >= DWC31_VERSIONTYPE_EA01 && - dwc->version_type <= DWC31_VERSIONTYPE_EA06))) { - + if (!dwc->dis_start_transfer_quirk && + (DWC3_VER_IS_PRIOR(DWC31, 170A) || + DWC3_VER_TYPE_IS_WITHIN(DWC31, 170A, EA01, EA06))) { if (dwc->gadget.speed <= USB_SPEED_HIGH && dep->direction) return dwc3_gadget_start_isoc_quirk(dep); } @@ -1822,7 +1820,7 @@ static int __dwc3_gadget_wakeup(struct dwc3 *dwc) } /* Recent versions do this automatically */ - if (dwc->revision < DWC3_REVISION_194A) { + if (DWC3_VER_IS_PRIOR(DWC3, 194A)) { /* write zeroes to Link Change Request */ reg = dwc3_readl(dwc->regs, DWC3_DCTL); reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK; @@ -1884,12 +1882,12 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend) reg = dwc3_readl(dwc->regs, DWC3_DCTL); if (is_on) { - if (dwc->revision <= DWC3_REVISION_187A) { + if (DWC3_VER_IS_WITHIN(DWC3, ANY, 187A)) { reg &= ~DWC3_DCTL_TRGTULST_MASK; reg |= DWC3_DCTL_TRGTULST_RX_DET; } - if (dwc->revision >= DWC3_REVISION_194A) + if (!DWC3_VER_IS_PRIOR(DWC3, 194A)) reg &= ~DWC3_DCTL_KEEP_CONNECT; reg |= DWC3_DCTL_RUN_STOP; @@ -1963,7 +1961,7 @@ static void dwc3_gadget_enable_irq(struct dwc3 *dwc) DWC3_DEVTEN_USBRSTEN | DWC3_DEVTEN_DISCONNEVTEN); - if (dwc->revision < DWC3_REVISION_250A) + if (DWC3_VER_IS_PRIOR(DWC3, 250A)) reg |= DWC3_DEVTEN_ULSTCNGEN; dwc3_writel(dwc->regs, DWC3_DEVTEN, reg); @@ -2044,10 +2042,10 @@ static int __dwc3_gadget_start(struct dwc3 *dwc) * bursts of data without going through any sort of endpoint throttling. */ reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); - if (dwc3_is_usb31(dwc)) - reg &= ~DWC31_GRXTHRCFG_PKTCNTSEL; - else + if (DWC3_IP_IS(DWC3)) reg &= ~DWC3_GRXTHRCFG_PKTCNTSEL; + else + reg &= ~DWC31_GRXTHRCFG_PKTCNTSEL; dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); @@ -2220,7 +2218,7 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, * STAR#9000525659: Clock Domain Crossing on DCTL in * USB 2.0 Mode */ - if (dwc->revision < DWC3_REVISION_220A && + if (DWC3_VER_IS_PRIOR(DWC3, 220A) && !dwc->dis_metastability_quirk) { reg |= DWC3_DCFG_SUPERSPEED; } else { @@ -2238,18 +2236,18 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, reg |= DWC3_DCFG_SUPERSPEED; break; case USB_SPEED_SUPER_PLUS: - if (dwc3_is_usb31(dwc)) - reg |= DWC3_DCFG_SUPERSPEED_PLUS; - else + if (DWC3_IP_IS(DWC3)) reg |= DWC3_DCFG_SUPERSPEED; + else + reg |= DWC3_DCFG_SUPERSPEED_PLUS; break; default: dev_err(dwc->dev, "invalid speed (%d)\n", speed); - if (dwc->revision & DWC3_REVISION_IS_DWC31) - reg |= DWC3_DCFG_SUPERSPEED_PLUS; - else + if (DWC3_IP_IS(DWC3)) reg |= DWC3_DCFG_SUPERSPEED; + else + reg |= DWC3_DCFG_SUPERSPEED_PLUS; } } dwc3_writel(dwc->regs, DWC3_DCFG, reg); @@ -2296,10 +2294,10 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep) mdwidth /= 8; size = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(dep->number >> 1)); - if (dwc3_is_usb31(dwc)) - size = DWC31_GTXFIFOSIZ_TXFDEP(size); - else + if (DWC3_IP_IS(DWC3)) size = DWC3_GTXFIFOSIZ_TXFDEP(size); + else + size = DWC31_GTXFIFOSIZ_TXFDEP(size); /* FIFO Depth is in MDWDITH bytes. Multiply */ size *= mdwidth; @@ -2342,10 +2340,10 @@ static int dwc3_gadget_init_out_endpoint(struct dwc3_ep *dep) /* All OUT endpoints share a single RxFIFO space */ size = dwc3_readl(dwc->regs, DWC3_GRXFIFOSIZ(0)); - if (dwc3_is_usb31(dwc)) - size = DWC31_GRXFIFOSIZ_RXFDEP(size); - else + if (DWC3_IP_IS(DWC3)) size = DWC3_GRXFIFOSIZ_RXFDEP(size); + else + size = DWC31_GRXFIFOSIZ_RXFDEP(size); /* FIFO depth is in MDWDITH bytes */ size *= mdwidth; @@ -2679,7 +2677,7 @@ static void dwc3_gadget_endpoint_transfer_in_progress(struct dwc3_ep *dep, * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround. * See dwc3_gadget_linksts_change_interrupt() for 1st half. */ - if (dwc->revision < DWC3_REVISION_183A) { + if (DWC3_VER_IS_PRIOR(DWC3, 183A)) { u32 reg; int i; @@ -2937,7 +2935,7 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) * STAR#9000466709: RTL: Device : Disconnect event not * generated if setup packet pending in FIFO */ - if (dwc->revision < DWC3_REVISION_188A) { + if (DWC3_VER_IS_PRIOR(DWC3, 188A)) { if (dwc->setup_packet_pending) dwc3_gadget_disconnect_interrupt(dwc); } @@ -2996,7 +2994,7 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) * STAR#9000483510: RTL: SS : USB3 reset event may * not be generated always when the link enters poll */ - if (dwc->revision < DWC3_REVISION_190A) + if (DWC3_VER_IS_PRIOR(DWC3, 190A)) dwc3_gadget_reset_interrupt(dwc); dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); @@ -3024,7 +3022,7 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) /* Enable USB2 LPM Capability */ - if ((dwc->revision > DWC3_REVISION_194A) && + if (!DWC3_VER_IS_WITHIN(DWC3, ANY, 194A) && (speed != DWC3_DSTS_SUPERSPEED) && (speed != DWC3_DSTS_SUPERSPEED_PLUS)) { reg = dwc3_readl(dwc->regs, DWC3_DCFG); @@ -3043,11 +3041,10 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) * BESL value in the LPM token is less than or equal to LPM * NYET threshold. */ - WARN_ONCE(dwc->revision < DWC3_REVISION_240A - && dwc->has_lpm_erratum, + WARN_ONCE(DWC3_VER_IS_PRIOR(DWC3, 240A) && dwc->has_lpm_erratum, "LPM Erratum not available on dwc3 revisions < 2.40a\n"); - if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A) + if (dwc->has_lpm_erratum && !DWC3_VER_IS_PRIOR(DWC3, 240A)) reg |= DWC3_DCTL_NYET_THRES(dwc->lpm_nyet_threshold); dwc3_gadget_dctl_write_safe(dwc, reg); @@ -3118,7 +3115,7 @@ static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, * operational mode */ pwropt = DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1); - if ((dwc->revision < DWC3_REVISION_250A) && + if (DWC3_VER_IS_PRIOR(DWC3, 250A) && (pwropt != DWC3_GHWPARAMS1_EN_PWROPT_HIB)) { if ((dwc->link_state == DWC3_LINK_STATE_U3) && (next == DWC3_LINK_STATE_RESUME)) { @@ -3144,7 +3141,7 @@ static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us * core send LGO_Ux entering U0 */ - if (dwc->revision < DWC3_REVISION_183A) { + if (DWC3_VER_IS_PRIOR(DWC3, 183A)) { if (next == DWC3_LINK_STATE_U0) { u32 u1u2; u32 reg; @@ -3255,7 +3252,7 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc, break; case DWC3_DEVICE_EVENT_EOPF: /* It changed to be suspend event for version 2.30a and above */ - if (dwc->revision >= DWC3_REVISION_230A) { + if (!DWC3_VER_IS_PRIOR(DWC3, 230A)) { /* * Ignore suspend event until the gadget enters into * USB_STATE_CONFIGURED state. @@ -3500,7 +3497,7 @@ int dwc3_gadget_init(struct dwc3 *dwc) * is less than super speed because we don't have means, yet, to tell * composite.c that we are USB 2.0 + LPM ECN. */ - if (dwc->revision < DWC3_REVISION_220A && + if (DWC3_VER_IS_PRIOR(DWC3, 220A) && !dwc->dis_metastability_quirk) dev_info(dwc->dev, "changing max_speed on rev %08x\n", dwc->revision); diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c index 86dbd012b984..bef1c1ac2067 100644 --- a/drivers/usb/dwc3/host.c +++ b/drivers/usb/dwc3/host.c @@ -104,7 +104,7 @@ int dwc3_host_init(struct dwc3 *dwc) * * This following flag tells XHCI to do just that. */ - if (dwc->revision <= DWC3_REVISION_300A) + if (DWC3_VER_IS_WITHIN(DWC3, ANY, 300A)) props[prop_idx++] = PROPERTY_ENTRY_BOOL("quirk-broken-port-ped"); if (prop_idx) { -- cgit v1.2.3 From 4244ba02edb850f880fafe178abccd9231cb0e4a Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Sat, 11 Apr 2020 19:20:07 -0700 Subject: usb: dwc3: Get MDWIDTH for DWC_usb32 DWC_usb32 supports MDWIDTH value larger than 255 and up to 1023. The field HWPARAMS6[9:8] stores the upper 2-bit values of the DWC_usb32's MDWIDTH. Check that parameter and properly get the MDWIDTH for DWC_usb32. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.h | 3 +++ drivers/usb/dwc3/debugfs.c | 14 ++++++++++++-- drivers/usb/dwc3/gadget.c | 7 +++++++ 3 files changed, 22 insertions(+), 2 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index b2903492437a..7204a838ec06 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -366,6 +366,9 @@ #define DWC3_GHWPARAMS6_SRPSUPPORT BIT(10) #define DWC3_GHWPARAMS6_EN_FPGA BIT(7) +/* DWC_usb32 only */ +#define DWC3_GHWPARAMS6_MDWIDTH(n) ((n) & (0x3 << 8)) + /* Global HWPARAMS7 Register */ #define DWC3_GHWPARAMS7_RAM1_DEPTH(n) ((n) & 0xffff) #define DWC3_GHWPARAMS7_RAM2_DEPTH(n) (((n) >> 16) & 0xffff) diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c index 4fe8b1e1485c..6d9de334e46a 100644 --- a/drivers/usb/dwc3/debugfs.c +++ b/drivers/usb/dwc3/debugfs.c @@ -635,13 +635,18 @@ static int dwc3_tx_fifo_size_show(struct seq_file *s, void *unused) struct dwc3_ep *dep = s->private; struct dwc3 *dwc = dep->dwc; unsigned long flags; + int mdwidth; u32 val; spin_lock_irqsave(&dwc->lock, flags); val = dwc3_core_fifo_space(dep, DWC3_TXFIFO); /* Convert to bytes */ - val *= DWC3_MDWIDTH(dwc->hwparams.hwparams0); + mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0); + if (DWC3_IP_IS(DWC32)) + mdwidth += DWC3_GHWPARAMS6_MDWIDTH(dwc->hwparams.hwparams6); + + val *= mdwidth; val >>= 3; seq_printf(s, "%u\n", val); spin_unlock_irqrestore(&dwc->lock, flags); @@ -654,13 +659,18 @@ static int dwc3_rx_fifo_size_show(struct seq_file *s, void *unused) struct dwc3_ep *dep = s->private; struct dwc3 *dwc = dep->dwc; unsigned long flags; + int mdwidth; u32 val; spin_lock_irqsave(&dwc->lock, flags); val = dwc3_core_fifo_space(dep, DWC3_RXFIFO); /* Convert to bytes */ - val *= DWC3_MDWIDTH(dwc->hwparams.hwparams0); + mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0); + if (DWC3_IP_IS(DWC32)) + mdwidth += DWC3_GHWPARAMS6_MDWIDTH(dwc->hwparams.hwparams6); + + val *= mdwidth; val >>= 3; seq_printf(s, "%u\n", val); spin_unlock_irqrestore(&dwc->lock, flags); diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 634c3ef00f21..865e6fbb7360 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2006,6 +2006,8 @@ static void dwc3_gadget_setup_nump(struct dwc3 *dwc) ram2_depth = DWC3_GHWPARAMS7_RAM2_DEPTH(dwc->hwparams.hwparams7); mdwidth = DWC3_GHWPARAMS0_MDWIDTH(dwc->hwparams.hwparams0); + if (DWC3_IP_IS(DWC32)) + mdwidth += DWC3_GHWPARAMS6_MDWIDTH(dwc->hwparams.hwparams6); nump = ((ram2_depth * mdwidth / 8) - 24 - 16) / 1024; nump = min_t(u32, nump, 16); @@ -2290,6 +2292,9 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep) int size; mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0); + if (DWC3_IP_IS(DWC32)) + mdwidth += DWC3_GHWPARAMS6_MDWIDTH(dwc->hwparams.hwparams6); + /* MDWIDTH is represented in bits, we need it in bytes */ mdwidth /= 8; @@ -2334,6 +2339,8 @@ static int dwc3_gadget_init_out_endpoint(struct dwc3_ep *dep) int size; mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0); + if (DWC3_IP_IS(DWC32)) + mdwidth += DWC3_GHWPARAMS6_MDWIDTH(dwc->hwparams.hwparams6); /* MDWIDTH is represented in bits, convert to bytes */ mdwidth /= 8; -- cgit v1.2.3 From b6842d4938c3101cb54dc262a6a89a5445f8fba8 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 5 May 2020 19:46:33 -0700 Subject: usb: dwc3: gadget: Check for in-progress END_TRANSFER While handling TRBs completion, if a END_TRANSFER command isn't completed, don't kick new transfer or issue END_TRANSFER command. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 865e6fbb7360..3bb6f847a865 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2675,11 +2675,15 @@ static void dwc3_gadget_endpoint_transfer_in_progress(struct dwc3_ep *dep, dwc3_gadget_ep_cleanup_completed_requests(dep, event, status); + if (dep->flags & DWC3_EP_END_TRANSFER_PENDING) + goto out; + if (stop) dwc3_stop_active_transfer(dep, true, true); else if (dwc3_gadget_ep_should_continue(dep)) __dwc3_gadget_kick_transfer(dep); +out: /* * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround. * See dwc3_gadget_linksts_change_interrupt() for 1st half. -- cgit v1.2.3 From 2e6e9e4b2ed70a9d7b1f860a349b5273ed73f9fa Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 5 May 2020 19:46:39 -0700 Subject: usb: dwc3: gadget: Refactor TRB completion handler To prepare for handling of XferComplete event, let's refactor and split up dwc3_gadget_endpoint_transfer_in_progress() to handle TRBs completion for different events. The handling of TRBs completion will be the same, but the status of XferComplete event is different than XferInProgress. No functional change in this commit. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 45 ++++++++++++++++++++++++++------------------- 1 file changed, 26 insertions(+), 19 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 3bb6f847a865..5f98b424f20b 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2654,34 +2654,22 @@ static void dwc3_gadget_endpoint_frame_from_event(struct dwc3_ep *dep, dep->frame_number = event->parameters; } -static void dwc3_gadget_endpoint_transfer_in_progress(struct dwc3_ep *dep, - const struct dwc3_event_depevt *event) +static bool dwc3_gadget_endpoint_trbs_complete(struct dwc3_ep *dep, + const struct dwc3_event_depevt *event, int status) { struct dwc3 *dwc = dep->dwc; - unsigned status = 0; - bool stop = false; - - dwc3_gadget_endpoint_frame_from_event(dep, event); - - if (event->status & DEPEVT_STATUS_BUSERR) - status = -ECONNRESET; - - if (event->status & DEPEVT_STATUS_MISSED_ISOC) { - status = -EXDEV; - - if (list_empty(&dep->started_list)) - stop = true; - } + bool no_started_trb = true; dwc3_gadget_ep_cleanup_completed_requests(dep, event, status); if (dep->flags & DWC3_EP_END_TRANSFER_PENDING) goto out; - if (stop) + if (status == -EXDEV && list_empty(&dep->started_list)) dwc3_stop_active_transfer(dep, true, true); else if (dwc3_gadget_ep_should_continue(dep)) - __dwc3_gadget_kick_transfer(dep); + if (__dwc3_gadget_kick_transfer(dep) == 0) + no_started_trb = false; out: /* @@ -2699,7 +2687,7 @@ out: continue; if (!list_empty(&dep->started_list)) - return; + return no_started_trb; } reg = dwc3_readl(dwc->regs, DWC3_DCTL); @@ -2708,6 +2696,25 @@ out: dwc->u1u2 = 0; } + + return no_started_trb; +} + +static void dwc3_gadget_endpoint_transfer_in_progress(struct dwc3_ep *dep, + const struct dwc3_event_depevt *event) +{ + int status = 0; + + if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) + dwc3_gadget_endpoint_frame_from_event(dep, event); + + if (event->status & DEPEVT_STATUS_BUSERR) + status = -ECONNRESET; + + if (event->status & DEPEVT_STATUS_MISSED_ISOC) + status = -EXDEV; + + dwc3_gadget_endpoint_trbs_complete(dep, event, status); } static void dwc3_gadget_endpoint_transfer_not_ready(struct dwc3_ep *dep, -- cgit v1.2.3 From 548f8b31656363c21867a0a0769932b6b3f0f8b6 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 5 May 2020 19:46:45 -0700 Subject: usb: dwc3: gadget: Enable XferComplete event To switch from one stream to another, this requires the driver to start a new transfer with a specific stream ID. For a transfer to complete, the driver needs to indicate the last TRB of a transfer, and it needs to enable XferComplete event to handle completed TRBs of a transfer. Let's enable this event only for stream capable endpoints. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 5f98b424f20b..81aa7de4cb17 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -579,6 +579,7 @@ static int dwc3_gadget_set_ep_config(struct dwc3_ep *dep, unsigned int action) if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) { params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE + | DWC3_DEPCFG_XFER_COMPLETE_EN | DWC3_DEPCFG_STREAM_EVENT_EN; dep->stream_capable = true; } -- cgit v1.2.3 From 3eaecd0c2333aa9eeefce2ff130c9323cde53178 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 5 May 2020 19:46:51 -0700 Subject: usb: dwc3: gadget: Handle XferComplete for streams In DWC3, to prepare TRBs for streams, all the TRBs of a transfer will use the same stream ID. To start a new stream, the driver needs to wait for the current transfer to complete or ended (by END_TRANFER command). As a result, inform the controller of the last TRB of a transfer so that it knows when a transfer completes and start a new transfer of a new stream. Even though the transfer completion handling can be applied for other non-isoc endpoints, only do it for streams due to its requirement. It's better to keep the controller's TRB cache full than waiting for transfer completion and starting a new transfer. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 34 ++++++++++++++++++++++++++++------ 1 file changed, 28 insertions(+), 6 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 81aa7de4cb17..052f6dc52a51 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -919,7 +919,8 @@ static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep) static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, dma_addr_t dma, unsigned length, unsigned chain, unsigned node, - unsigned stream_id, unsigned short_not_ok, unsigned no_interrupt) + unsigned stream_id, unsigned short_not_ok, + unsigned no_interrupt, unsigned is_last) { struct dwc3 *dwc = dep->dwc; struct usb_gadget *gadget = &dwc->gadget; @@ -1012,6 +1013,8 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, if (chain) trb->ctrl |= DWC3_TRB_CTRL_CHN; + else if (dep->stream_capable && is_last) + trb->ctrl |= DWC3_TRB_CTRL_LST; if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable) trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(stream_id); @@ -1039,6 +1042,7 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep, unsigned stream_id = req->request.stream_id; unsigned short_not_ok = req->request.short_not_ok; unsigned no_interrupt = req->request.no_interrupt; + unsigned is_last = req->request.is_last; if (req->request.num_sgs > 0) { length = sg_dma_len(req->start_sg); @@ -1059,7 +1063,7 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep, req->num_trbs++; __dwc3_prepare_one_trb(dep, trb, dma, length, chain, node, - stream_id, short_not_ok, no_interrupt); + stream_id, short_not_ok, no_interrupt, is_last); } static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep, @@ -1104,7 +1108,8 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep, maxp - rem, false, 1, req->request.stream_id, req->request.short_not_ok, - req->request.no_interrupt); + req->request.no_interrupt, + req->request.is_last); } else { dwc3_prepare_one_trb(dep, req, chain, i); } @@ -1148,7 +1153,8 @@ static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep, __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, maxp - rem, false, 1, req->request.stream_id, req->request.short_not_ok, - req->request.no_interrupt); + req->request.no_interrupt, + req->request.is_last); } else if (req->request.zero && req->request.length && (IS_ALIGNED(req->request.length, maxp))) { struct dwc3 *dwc = dep->dwc; @@ -1165,7 +1171,8 @@ static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep, __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, 0, false, 1, req->request.stream_id, req->request.short_not_ok, - req->request.no_interrupt); + req->request.no_interrupt, + req->request.is_last); } else { dwc3_prepare_one_trb(dep, req, false, 0); } @@ -2718,6 +2725,19 @@ static void dwc3_gadget_endpoint_transfer_in_progress(struct dwc3_ep *dep, dwc3_gadget_endpoint_trbs_complete(dep, event, status); } +static void dwc3_gadget_endpoint_transfer_complete(struct dwc3_ep *dep, + const struct dwc3_event_depevt *event) +{ + int status = 0; + + dep->flags &= ~DWC3_EP_TRANSFER_STARTED; + + if (event->status & DEPEVT_STATUS_BUSERR) + status = -ECONNRESET; + + dwc3_gadget_endpoint_trbs_complete(dep, event, status); +} + static void dwc3_gadget_endpoint_transfer_not_ready(struct dwc3_ep *dep, const struct dwc3_event_depevt *event) { @@ -2781,8 +2801,10 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc, dep->flags &= ~DWC3_EP_DELAY_START; } break; - case DWC3_DEPEVT_STREAMEVT: case DWC3_DEPEVT_XFERCOMPLETE: + dwc3_gadget_endpoint_transfer_complete(dep, event); + break; + case DWC3_DEPEVT_STREAMEVT: case DWC3_DEPEVT_RXTXFIFOEVT: break; } -- cgit v1.2.3 From e0d19563eb6c191ca5539789173fb0e8fc5e69ed Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 5 May 2020 19:46:57 -0700 Subject: usb: dwc3: gadget: Wait for transfer completion If a transfer is in-progress, any new request should not kick off another transfer. The driver needs to wait for the current transfer to complete before starting off the next transfer. Introduce a new flag DWC3_EP_WAIT_TRANSFER_COMPLETE for this. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.h | 1 + drivers/usb/dwc3/gadget.c | 9 ++++++++- 2 files changed, 9 insertions(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 7204a838ec06..b11183a715a7 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -701,6 +701,7 @@ struct dwc3_ep { #define DWC3_EP_END_TRANSFER_PENDING BIT(4) #define DWC3_EP_PENDING_REQUEST BIT(5) #define DWC3_EP_DELAY_START BIT(6) +#define DWC3_EP_WAIT_TRANSFER_COMPLETE BIT(7) /* This last one is specific to EP0 */ #define DWC3_EP0_DIR_IN BIT(31) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 052f6dc52a51..97c6a5785725 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1292,6 +1292,9 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep) return ret; } + if (dep->stream_capable && req->request.is_last) + dep->flags |= DWC3_EP_WAIT_TRANSFER_COMPLETE; + return 0; } @@ -1498,6 +1501,9 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) list_add_tail(&req->list, &dep->pending_list); req->status = DWC3_REQUEST_STATUS_QUEUED; + if (dep->flags & DWC3_EP_WAIT_TRANSFER_COMPLETE) + return 0; + /* Start the transfer only after the END_TRANSFER is completed */ if (dep->flags & DWC3_EP_END_TRANSFER_PENDING) { dep->flags |= DWC3_EP_DELAY_START; @@ -2735,7 +2741,8 @@ static void dwc3_gadget_endpoint_transfer_complete(struct dwc3_ep *dep, if (event->status & DEPEVT_STATUS_BUSERR) status = -ECONNRESET; - dwc3_gadget_endpoint_trbs_complete(dep, event, status); + if (dwc3_gadget_endpoint_trbs_complete(dep, event, status)) + dep->flags &= ~DWC3_EP_WAIT_TRANSFER_COMPLETE; } static void dwc3_gadget_endpoint_transfer_not_ready(struct dwc3_ep *dep, -- cgit v1.2.3 From aefe3d232b6629cb0ac92cc3d4238a5133dd9fec Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 5 May 2020 19:47:03 -0700 Subject: usb: dwc3: gadget: Don't prepare beyond a transfer Don't prepare TRBs beyond a transfer. In DWC_usb32, its transfer burst capability may try to read and use TRBs beyond the active transfer. For other controllers, they don't process the next transfer TRBs until the current transfer is completed. Explicitly prevent preparing TRBs ahead for all controllers. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 97c6a5785725..07824b670440 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1231,6 +1231,14 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep) if (!dwc3_calc_trbs_left(dep)) return; + + /* + * Don't prepare beyond a transfer. In DWC_usb32, its transfer + * burst capability may try to read and use TRBs beyond the + * active transfer instead of stopping. + */ + if (dep->stream_capable && req->request.is_last) + return; } } -- cgit v1.2.3 From 140ca4cfea8a7aeff89c8969a4cc7ce125a04159 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 5 May 2020 19:47:09 -0700 Subject: usb: dwc3: gadget: Handle stream transfers Overview of stream transfer requirement: * A transfer will have a set of TRBs of the same stream ID. * A transfer is started with a stream ID in START_TRANSFER command. * A new stream will only start when the previous completes. Overview of stream events: * A "prime" from host indicates that its endpoints are active (buffers prepared and ready to receive/transmit data). The controller automatically initiates stream if it sees this. * A "NoStream" rejection event indicates that the host isn't ready. Host will put the endpoint back to idle state. Device may need to reinitiate the stream to start transfer again. * A Stream Found event means host accepted device initiated stream. Nothing needs to be done from driver. To initiate a stream, the driver will issue START_TRANSFER command with a stream ID. To reinitiate the stream, the driver must issue END_TRANSFER and restart the transfer with START_TRANSFER command with the same stream ID. This implementation handles device-initated streams (e.g. UASP driver). It also handles some hosts' quirky behavior where they only prime each endpoint once. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.h | 8 ++++ drivers/usb/dwc3/debug.h | 2 + drivers/usb/dwc3/gadget.c | 97 +++++++++++++++++++++++++++++++++++++++++++++-- 3 files changed, 104 insertions(+), 3 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index b11183a715a7..4def088329c7 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -495,6 +495,7 @@ #define DWC3_DGCMD_SELECTED_FIFO_FLUSH 0x09 #define DWC3_DGCMD_ALL_FIFO_FLUSH 0x0a #define DWC3_DGCMD_SET_ENDPOINT_NRDY 0x0c +#define DWC3_DGCMD_SET_ENDPOINT_PRIME 0x0d #define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK 0x10 #define DWC3_DGCMD_STATUS(n) (((n) >> 12) & 0x0F) @@ -702,6 +703,9 @@ struct dwc3_ep { #define DWC3_EP_PENDING_REQUEST BIT(5) #define DWC3_EP_DELAY_START BIT(6) #define DWC3_EP_WAIT_TRANSFER_COMPLETE BIT(7) +#define DWC3_EP_IGNORE_NEXT_NOSTREAM BIT(8) +#define DWC3_EP_FORCE_RESTART_STREAM BIT(9) +#define DWC3_EP_FIRST_STREAM_PRIMED BIT(10) /* This last one is specific to EP0 */ #define DWC3_EP0_DIR_IN BIT(31) @@ -1301,6 +1305,10 @@ struct dwc3_event_depevt { #define DEPEVT_STREAMEVT_FOUND 1 #define DEPEVT_STREAMEVT_NOTFOUND 2 +/* Stream event parameter */ +#define DEPEVT_STREAM_PRIME 0xfffe +#define DEPEVT_STREAM_NOSTREAM 0x0 + /* Control-only Status */ #define DEPEVT_STATUS_CONTROL_DATA 1 #define DEPEVT_STATUS_CONTROL_STATUS 2 diff --git a/drivers/usb/dwc3/debug.h b/drivers/usb/dwc3/debug.h index 0f95656c9622..d8f600e0e88f 100644 --- a/drivers/usb/dwc3/debug.h +++ b/drivers/usb/dwc3/debug.h @@ -68,6 +68,8 @@ dwc3_gadget_generic_cmd_string(u8 cmd) return "All FIFO Flush"; case DWC3_DGCMD_SET_ENDPOINT_NRDY: return "Set Endpoint NRDY"; + case DWC3_DGCMD_SET_ENDPOINT_PRIME: + return "Set Endpoint Prime"; case DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK: return "Run SoC Bus Loopback Test"; default: diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 07824b670440..0380f76151a1 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -610,6 +610,9 @@ static int dwc3_gadget_set_ep_config(struct dwc3_ep *dep, unsigned int action) return dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_SETEPCONFIG, ¶ms); } +static void dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, + bool interrupt); + /** * __dwc3_gadget_ep_enable - initializes a hw endpoint * @dep: endpoint to be initialized @@ -670,7 +673,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, unsigned int action) * Issue StartTransfer here with no-op TRB so we can always rely on No * Response Update Transfer command. */ - if ((usb_endpoint_xfer_bulk(desc) && !dep->stream_capable) || + if (usb_endpoint_xfer_bulk(desc) || usb_endpoint_xfer_int(desc)) { struct dwc3_gadget_ep_cmd_params params; struct dwc3_trb *trb; @@ -689,6 +692,29 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, unsigned int action) ret = dwc3_send_gadget_ep_cmd(dep, cmd, ¶ms); if (ret < 0) return ret; + + if (dep->stream_capable) { + /* + * For streams, at start, there maybe a race where the + * host primes the endpoint before the function driver + * queues a request to initiate a stream. In that case, + * the controller will not see the prime to generate the + * ERDY and start stream. To workaround this, issue a + * no-op TRB as normal, but end it immediately. As a + * result, when the function driver queues the request, + * the next START_TRANSFER command will cause the + * controller to generate an ERDY to initiate the + * stream. + */ + dwc3_stop_active_transfer(dep, true, true); + + /* + * All stream eps will reinitiate stream on NoStream + * rejection until we can determine that the host can + * prime after the first transfer. + */ + dep->flags |= DWC3_EP_FORCE_RESTART_STREAM; + } } out: @@ -697,8 +723,6 @@ out: return 0; } -static void dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, - bool interrupt); static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep) { struct dwc3_request *req; @@ -2772,6 +2796,63 @@ static void dwc3_gadget_endpoint_transfer_not_ready(struct dwc3_ep *dep, (void) __dwc3_gadget_start_isoc(dep); } +static void dwc3_gadget_endpoint_stream_event(struct dwc3_ep *dep, + const struct dwc3_event_depevt *event) +{ + struct dwc3 *dwc = dep->dwc; + + if (event->status == DEPEVT_STREAMEVT_FOUND) { + dep->flags |= DWC3_EP_FIRST_STREAM_PRIMED; + goto out; + } + + /* Note: NoStream rejection event param value is 0 and not 0xFFFF */ + switch (event->parameters) { + case DEPEVT_STREAM_PRIME: + /* + * If the host can properly transition the endpoint state from + * idle to prime after a NoStream rejection, there's no need to + * force restarting the endpoint to reinitiate the stream. To + * simplify the check, assume the host follows the USB spec if + * it primed the endpoint more than once. + */ + if (dep->flags & DWC3_EP_FORCE_RESTART_STREAM) { + if (dep->flags & DWC3_EP_FIRST_STREAM_PRIMED) + dep->flags &= ~DWC3_EP_FORCE_RESTART_STREAM; + else + dep->flags |= DWC3_EP_FIRST_STREAM_PRIMED; + } + + break; + case DEPEVT_STREAM_NOSTREAM: + if ((dep->flags & DWC3_EP_IGNORE_NEXT_NOSTREAM) || + !(dep->flags & DWC3_EP_FORCE_RESTART_STREAM) || + !(dep->flags & DWC3_EP_WAIT_TRANSFER_COMPLETE)) + break; + + /* + * If the host rejects a stream due to no active stream, by the + * USB and xHCI spec, the endpoint will be put back to idle + * state. When the host is ready (buffer added/updated), it will + * prime the endpoint to inform the usb device controller. This + * triggers the device controller to issue ERDY to restart the + * stream. However, some hosts don't follow this and keep the + * endpoint in the idle state. No prime will come despite host + * streams are updated, and the device controller will not be + * triggered to generate ERDY to move the next stream data. To + * workaround this and maintain compatibility with various + * hosts, force to reinitate the stream until the host is ready + * instead of waiting for the host to prime the endpoint. + */ + dep->flags |= DWC3_EP_DELAY_START; + dwc3_stop_active_transfer(dep, true, true); + return; + } + +out: + dep->flags &= ~DWC3_EP_IGNORE_NEXT_NOSTREAM; +} + static void dwc3_endpoint_interrupt(struct dwc3 *dwc, const struct dwc3_event_depevt *event) { @@ -2820,6 +2901,8 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc, dwc3_gadget_endpoint_transfer_complete(dep, event); break; case DWC3_DEPEVT_STREAMEVT: + dwc3_gadget_endpoint_stream_event(dep, event); + break; case DWC3_DEPEVT_RXTXFIFOEVT: break; } @@ -2911,6 +2994,14 @@ static void dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, WARN_ON_ONCE(ret); dep->resource_index = 0; + /* + * The END_TRANSFER command will cause the controller to generate a + * NoStream Event, and it's not due to the host DP NoStream rejection. + * Ignore the next NoStream event. + */ + if (dep->stream_capable) + dep->flags |= DWC3_EP_IGNORE_NEXT_NOSTREAM; + if (!interrupt) dep->flags &= ~DWC3_EP_TRANSFER_STARTED; else -- cgit v1.2.3 From b10e1c2535777fa393c494d6fa2096c7c3219250 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Tue, 5 May 2020 19:47:15 -0700 Subject: usb: dwc3: gadget: Use SET_EP_PRIME for NoStream DWC_usb32 v1.00a and later can use SET_EP_PRIME command to reinitiate a stream. Use the command to handle NoStream rejection instead of ending and restarting the endpoint. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.h | 3 +++ drivers/usb/dwc3/gadget.c | 13 ++++++++++--- 2 files changed, 13 insertions(+), 3 deletions(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 4def088329c7..013f42a2b5dc 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -1161,6 +1161,9 @@ struct dwc3 { #define DWC31_REVISION_180A 0x3138302a #define DWC31_REVISION_190A 0x3139302a +#define DWC32_REVISION_ANY 0x0 +#define DWC32_REVISION_100A 0x3130302a + u32 version_type; #define DWC31_VERSIONTYPE_ANY 0x0 diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 0380f76151a1..fea4fde1b5e3 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2844,9 +2844,16 @@ static void dwc3_gadget_endpoint_stream_event(struct dwc3_ep *dep, * hosts, force to reinitate the stream until the host is ready * instead of waiting for the host to prime the endpoint. */ - dep->flags |= DWC3_EP_DELAY_START; - dwc3_stop_active_transfer(dep, true, true); - return; + if (DWC3_VER_IS_WITHIN(DWC32, 100A, ANY)) { + unsigned int cmd = DWC3_DGCMD_SET_ENDPOINT_PRIME; + + dwc3_send_gadget_generic_command(dwc, cmd, dep->number); + } else { + dep->flags |= DWC3_EP_DELAY_START; + dwc3_stop_active_transfer(dep, true, true); + return; + } + break; } out: -- cgit v1.2.3 From 1c0e69ae1b9f9004fd72978612ae3463791edc56 Mon Sep 17 00:00:00 2001 From: Yu Chen Date: Thu, 21 May 2020 16:46:43 +0800 Subject: usb: dwc3: Increase timeout for CmdAct cleared by device controller If the SS PHY is in P3, there is no pipe_clk, HW may use suspend_clk for function, as suspend_clk is slow so EP command need more time to complete, e.g, imx8M suspend_clk is 32K, set ep configuration will take about 380us per below trace time stamp(44.286278 - 44.285897 = 0.000381): configfs_acm.sh-822 [000] d..1 44.285896: dwc3_writel: addr 000000006d59aae1 value 00000401 configfs_acm.sh-822 [000] d..1 44.285897: dwc3_readl: addr 000000006d59aae1 value 00000401 ... ... configfs_acm.sh-822 [000] d..1 44.286278: dwc3_readl: addr 000000006d59aae1 value 00000001 configfs_acm.sh-822 [000] d..1 44.286279: dwc3_gadget_ep_cmd: ep0out: cmd 'Set Endpoint Configuration' [401] params 00001000 00000500 00000000 --> status: Successful This was originally found on Hisilicon Kirin Soc that need more time for the device controller to clear the CmdAct of DEPCMD. Signed-off-by: Yu Chen Signed-off-by: John Stultz Signed-off-by: Li Jun Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index fea4fde1b5e3..7739fe054e34 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -273,7 +273,7 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd, { const struct usb_endpoint_descriptor *desc = dep->endpoint.desc; struct dwc3 *dwc = dep->dwc; - u32 timeout = 1000; + u32 timeout = 5000; u32 saved_config = 0; u32 reg; -- cgit v1.2.3 From 63c7bb299fc9c430070c0177f0879635e9ee23d0 Mon Sep 17 00:00:00 2001 From: Thinh Nguyen Date: Fri, 15 May 2020 16:40:46 -0700 Subject: usb: dwc3: gadget: Check for prepared TRBs There are cases where the endpoint needs to be restarted. For example, it may need to restart for NoStream rejection to reinitiate stream. If so, check and make sure we don't prepare beyond the current transfer when we restart the endpoint. DWC_usb32 internal burst transfer feature will look into TRBs beyond a transfer. Other controllers will stop on the last TRB, but not DWC_usb32. This may cause the controller to incorrectly process TRBs of a different transfer. Make sure to explicitly prevent preparing TRBs of a different transfer. This should only affect DWC_usb32 releases prior to v1.00a since it doesn't use SET_ENDPOINT_PRIME to reinitiate stream. However, it's better to be cautious in case users don't want to use SET_ENDPOINT_PRIME command. Also, it's possible other controller IPs may share the same features as DWC_usb32 in new releases. Signed-off-by: Thinh Nguyen Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/gadget.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 7739fe054e34..f5fbe784fa04 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1232,6 +1232,14 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep) if (!dwc3_calc_trbs_left(dep)) return; + + /* + * Don't prepare beyond a transfer. In DWC_usb32, its transfer + * burst capability may try to read and use TRBs beyond the + * active transfer instead of stopping. + */ + if (dep->stream_capable && req->request.is_last) + return; } list_for_each_entry_safe(req, n, &dep->pending_list, list) { -- cgit v1.2.3 From 1c11e74e9079289d8aaccc34b74cbf6463c0b791 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Mon, 25 May 2020 10:10:48 +0300 Subject: usb: dwc3: keystone: Turn on USB3 PHY before controller The Local Power Sleep Controller (LPSC) dependency on AM65 requires SERDES0 to be powered on before USB. We need to power up SERDES0 power domain and hold it on throughout the reset, init, power on sequence. Signed-off-by: Roger Quadros Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/dwc3-keystone.c | 41 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) (limited to 'drivers/usb/dwc3') diff --git a/drivers/usb/dwc3/dwc3-keystone.c b/drivers/usb/dwc3/dwc3-keystone.c index 1e14a6f4884b..6505f7bd69e2 100644 --- a/drivers/usb/dwc3/dwc3-keystone.c +++ b/drivers/usb/dwc3/dwc3-keystone.c @@ -14,6 +14,7 @@ #include #include #include +#include #include /* USBSS register offsets */ @@ -34,6 +35,7 @@ struct dwc3_keystone { struct device *dev; void __iomem *usbss; + struct phy *usb3_phy; }; static inline u32 kdwc3_readl(void __iomem *base, u32 offset) @@ -95,8 +97,38 @@ static int kdwc3_probe(struct platform_device *pdev) if (IS_ERR(kdwc->usbss)) return PTR_ERR(kdwc->usbss); - pm_runtime_enable(kdwc->dev); + /* PSC dependency on AM65 needs SERDES0 to be powered before USB0 */ + kdwc->usb3_phy = devm_phy_optional_get(dev, "usb3-phy"); + if (IS_ERR(kdwc->usb3_phy)) { + error = PTR_ERR(kdwc->usb3_phy); + if (error != -EPROBE_DEFER) + dev_err(dev, "couldn't get usb3 phy: %d\n", error); + + return error; + } + + phy_pm_runtime_get_sync(kdwc->usb3_phy); + error = phy_reset(kdwc->usb3_phy); + if (error < 0) { + dev_err(dev, "usb3 phy reset failed: %d\n", error); + return error; + } + + error = phy_init(kdwc->usb3_phy); + if (error < 0) { + dev_err(dev, "usb3 phy init failed: %d\n", error); + return error; + } + + error = phy_power_on(kdwc->usb3_phy); + if (error < 0) { + dev_err(dev, "usb3 phy power on failed: %d\n", error); + phy_exit(kdwc->usb3_phy); + return error; + } + + pm_runtime_enable(kdwc->dev); error = pm_runtime_get_sync(kdwc->dev); if (error < 0) { dev_err(kdwc->dev, "pm_runtime_get_sync failed, error %d\n", @@ -138,6 +170,9 @@ err_core: err_irq: pm_runtime_put_sync(kdwc->dev); pm_runtime_disable(kdwc->dev); + phy_power_off(kdwc->usb3_phy); + phy_exit(kdwc->usb3_phy); + phy_pm_runtime_put_sync(kdwc->usb3_phy); return error; } @@ -163,6 +198,10 @@ static int kdwc3_remove(struct platform_device *pdev) pm_runtime_put_sync(kdwc->dev); pm_runtime_disable(kdwc->dev); + phy_power_off(kdwc->usb3_phy); + phy_exit(kdwc->usb3_phy); + phy_pm_runtime_put_sync(kdwc->usb3_phy); + platform_set_drvdata(pdev, NULL); return 0; -- cgit v1.2.3