From ff18e1ef04e2073889569b07a5ddd54a6527917f Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 1 Mar 2017 10:08:12 +0100 Subject: spi/bcm63xx-hsspi: allow providing clock rate through a second clock The HSSPI block actually has two clock inputs, one for gating the block, and one for the PLL rate. To allow these to be represented as two clocks, add support for retrieving the rate from a separate "pll" clock, if the "hsspi" clock does not provide one. Signed-off-by: Jonas Gorski Acked-by: Florian Fainelli Signed-off-by: Mark Brown --- drivers/spi/spi-bcm63xx-hsspi.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c index 55789f7cda92..79096d17ebde 100644 --- a/drivers/spi/spi-bcm63xx-hsspi.c +++ b/drivers/spi/spi-bcm63xx-hsspi.c @@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) return PTR_ERR(clk); rate = clk_get_rate(clk); - if (!rate) - return -EINVAL; + if (!rate) { + struct clk *pll_clk = devm_clk_get(dev, "pll"); + + if (IS_ERR(pll_clk)) + return PTR_ERR(pll_clk); + + rate = clk_get_rate(pll_clk); + if (!rate) + return -EINVAL; + } ret = clk_prepare_enable(clk); if (ret) -- cgit v1.2.3