From d0312fdbf3e1dc34bc370b17fee290921cf9b814 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 23 Dec 2019 20:00:46 +0530 Subject: phy: qcom-qmp: Add SW reset register For V4 QMP UFS Phy, we need to assert reset bits, configure the phy and then deassert it, so add the QPHY_SW_RESET register which does this. Signed-off-by: Vinod Koul Reviewed-by: Manu Gautam Reviewed-by: Can Guo Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/qualcomm/phy-qcom-qmp.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/phy/qualcomm') diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index dee5616253f5..45c9de4a6f55 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -168,6 +168,7 @@ static const unsigned int sdm845_ufsphy_regs_layout[] = { static const unsigned int sm8150_ufsphy_regs_layout[] = { [QPHY_START_CTRL] = QPHY_V4_PHY_START, [QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_READY_STATUS, + [QPHY_SW_RESET] = QPHY_V4_SW_RESET, }; static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = { -- cgit v1.2.3