From 8e08e191fc932b4fc2de014c358f8946a4af57e1 Mon Sep 17 00:00:00 2001 From: Johannes Berg Date: Thu, 17 Jun 2021 11:07:28 +0300 Subject: iwlwifi: pcie: remove TR/CR tail allocations The TR/CR tail data are meant to be per-queue-arrays, however, we allocate them completely wrong (we have a separate allocation per queue). Looking at this more closely, it turns out that the hardware never uses these - we have a separate free list per RX queue and maintain a write pointer for that in a register, and the RX itself is indicated in the RB status (rb_stts) DMA region. Despite nothing using the tail pointers, the hardware will unconditionally access them to write updates, even when we aren't using CRs/TRs. Give it dummy values that we never use/update so it can do that without causing trouble. Signed-off-by: Johannes Berg Signed-off-by: Luca Coelho Link: https://lore.kernel.org/r/iwlwifi.20210617110647.5f5764e04c46.I4d5de1929be048085767f1234a1e07b517ab6a2d@changeid Signed-off-by: Luca Coelho --- drivers/net/wireless/intel/iwlwifi/pcie/internal.h | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'drivers/net/wireless/intel/iwlwifi/pcie/internal.h') diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/internal.h b/drivers/net/wireless/intel/iwlwifi/pcie/internal.h index 1c740c382b9b..292b972a25db 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/internal.h +++ b/drivers/net/wireless/intel/iwlwifi/pcie/internal.h @@ -111,10 +111,6 @@ struct iwl_rx_completion_desc { * @bd_dma: bus address of buffer of receive buffer descriptors (rbd) * @used_bd: driver's pointer to buffer of used receive buffer descriptors (rbd) * @used_bd_dma: physical address of buffer of used receive buffer descriptors (rbd) - * @tr_tail: driver's pointer to the transmission ring tail buffer - * @tr_tail_dma: physical address of the buffer for the transmission ring tail - * @cr_tail: driver's pointer to the completion ring tail buffer - * @cr_tail_dma: physical address of the buffer for the completion ring tail * @read: Shared index to newest available Rx buffer * @write: Shared index to oldest written Rx packet * @free_count: Number of pre-allocated buffers in rx_free @@ -142,10 +138,6 @@ struct iwl_rxq { struct iwl_rx_completion_desc *cd; }; dma_addr_t used_bd_dma; - __le16 *tr_tail; - dma_addr_t tr_tail_dma; - __le16 *cr_tail; - dma_addr_t cr_tail_dma; u32 read; u32 write; u32 free_count; @@ -533,9 +525,6 @@ static inline void _iwl_disable_interrupts(struct iwl_trans *trans) IWL_DEBUG_ISR(trans, "Disabled interrupts\n"); } -#define IWL_NUM_OF_COMPLETION_RINGS 31 -#define IWL_NUM_OF_TRANSFER_RINGS 527 - static inline int iwl_pcie_get_num_sections(const struct fw_img *fw, int start) { -- cgit v1.2.3