From 76c23c32e3b3ad48e07e07897075ab19ae1ef117 Mon Sep 17 00:00:00 2001 From: Feng Kan Date: Tue, 25 Aug 2009 11:27:20 -0700 Subject: mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver Fix ECC Correction bug where the byte offset location were double fliped causing correction routine to toggle the wrong byte location in the ECC segment. The ndfc_calculate_ecc routine change the order of getting the ECC code. /* The NDFC uses Smart Media (SMC) bytes order */ ecc_code[0] = p[2]; ecc_code[1] = p[1]; ecc_code[2] = p[3]; But in the Correction algorithm when calculating the byte offset location, the b1 is used as the upper part of the address. Which again reverse the order making the final byte offset address location incorrect. byte_addr = (addressbits[b1] << 4) + addressbits[b0]; The order is change to read it in straight and let the correction function to revert it to SMC order. Cc: stable@kernel.org Signed-off-by: Feng Kan Acked-by: Victor Gallardo Acked-by: Prodyut Hazarika Acked-by: Stefan Roese Signed-off-by: David Woodhouse --- drivers/mtd/nand/ndfc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 89bf85af642c..40b5658bdbe6 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -102,8 +102,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtd, wmb(); ecc = in_be32(ndfc->ndfcbase + NDFC_ECC); /* The NDFC uses Smart Media (SMC) bytes order */ - ecc_code[0] = p[2]; - ecc_code[1] = p[1]; + ecc_code[0] = p[1]; + ecc_code[1] = p[2]; ecc_code[2] = p[3]; return 0; -- cgit v1.2.3