From d0ba932a9aca90e87181ddda3fabec03778a28a2 Mon Sep 17 00:00:00 2001 From: Ben Chuang Date: Wed, 19 Jan 2022 15:53:06 +0800 Subject: mmc: sdhci-pci-gli: Reduce the SSC value at 205MHz for GL9750 and GL9755 The SSC value is 0xFFE7 at 205MHz and may be saturated. Reduce the SSC value to 0x5A1D at 205MHz to reduce this situation for GL9750 and GL9755. Signed-off-by: Ben Chuang Link: https://lore.kernel.org/r/20220119075306.36262-1-benchuanggli@gmail.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-pci-gli.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/mmc') diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c index 97035d77c18c..dcd304385529 100644 --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -393,7 +393,7 @@ static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm) static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host) { /* set pll to 205MHz and enable ssc */ - gl9750_set_ssc(host, 0x1, 0x1F, 0xFFE7); + gl9750_set_ssc(host, 0x1, 0xF, 0x5A1D); gl9750_set_pll(host, 0x1, 0x246, 0x0); } @@ -536,7 +536,7 @@ static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm) static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev) { /* set pll to 205MHz and enable ssc */ - gl9755_set_ssc(pdev, 0x1, 0x1F, 0xFFE7); + gl9755_set_ssc(pdev, 0x1, 0xF, 0x5A1D); gl9755_set_pll(pdev, 0x1, 0x246, 0x0); } -- cgit v1.2.3