From 49f91ac3310da217ba877b1872d2aba907022a22 Mon Sep 17 00:00:00 2001 From: Derek Basehore Date: Mon, 18 Nov 2013 11:30:48 +0100 Subject: mfd: cros ec: spi: Increase EC transaction delay 50 us is not a long enough delay between EC transactions. At least 70 us are needed for the 16 MHz STM32L part. Increase the delay to 200 us for an extra safety margin. Reviewed-by: Randall Spangler Signed-off-by: Derek Basehore Signed-off-by: Thierry Reding Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_spi.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'drivers/mfd/cros_ec_spi.c') diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c index 367ccb58ecb1..ab49fe51a5d1 100644 --- a/drivers/mfd/cros_ec_spi.c +++ b/drivers/mfd/cros_ec_spi.c @@ -50,10 +50,11 @@ /* * Time between raising the SPI chip select (for the end of a * transaction) and dropping it again (for the next transaction). - * If we go too fast, the EC will miss the transaction. It seems - * that 50us is enough with the 16MHz STM32 EC. + * If we go too fast, the EC will miss the transaction. We know that we + * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be + * safe. */ -#define EC_SPI_RECOVERY_TIME_NS (50 * 1000) +#define EC_SPI_RECOVERY_TIME_NS (200 * 1000) /** * struct cros_ec_spi - information about a SPI-connected EC -- cgit v1.2.3