From 298dcb2dd0267d51e4f7c94a628cd0765a50ad75 Mon Sep 17 00:00:00 2001 From: Grzegorz Jaszczyk Date: Thu, 25 Sep 2014 13:17:18 +0200 Subject: irqchip: armada-370-xp: Fix MSI interrupt handling The MSI interrupts use the 16 high doorbells, which are notified by using IRQ1 of the main interrupt controller. The MSI interrupts were handled correctly for Armada-XP and Armada-370 but not for Armada-375 and Armada-38x, which use chained handler for the MPIC. This commit fixes that by checking proper interrupt number in chained handler for the MPIC. Signed-off-by: Grzegorz Jaszczyk Reviewed-by: Gregory CLEMENT Fixes: bc69b8adfe22 ("irqchip: armada-370-xp: Setup a chained handler for the MPIC") Cc: # v3.15+ Acked-by: Ezequiel Garcia Link: https://lkml.kernel.org/r/1411643839-64925-2-git-send-email-jaz@semihalf.com Signed-off-by: Jason Cooper --- drivers/irqchip/irq-armada-370-xp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/irqchip/irq-armada-370-xp.c') diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 3e238cd049e6..2f01073d6201 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -413,9 +413,9 @@ static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq, irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE); - if (irqmap & BIT(0)) { + if (irqmap & BIT(1)) { armada_370_xp_handle_msi_irq(NULL, true); - irqmap &= ~BIT(0); + irqmap &= ~BIT(1); } for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) { -- cgit v1.2.3