From 5e37bdc081a980dd0d669e6387bcf15ca9666f81 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Sat, 26 Apr 2008 22:25:24 +0200 Subject: ide: add struct ide_dma_ops (take 3) Add struct ide_dma_ops and convert core code + drivers to use it. While at it: * Drop "ide_" prefix from ->ide_dma_end and ->ide_dma_test_irq methods. * Drop "ide_" "infixes" from DMA methods. * au1xxx-ide.c: - use auide_dma_{test_irq,end}() directly in auide_dma_timeout() * pdc202xx_old.c: - drop "old_" "infixes" from DMA methods * siimage.c: - add siimage_dma_test_irq() helper - print SATA warning in siimage_init_one() * Remove no longer needed ->init_hwif implementations. v2: * Changes based on review from Sergei: - s/siimage_ide_dma_test_irq/siimage_dma_test_irq/ - s/drive->hwif/hwif/ in idefloppy_pc_intr(). - fix patch description w.r.t. au1xxx-ide changes - fix au1xxx-ide build - fix naming for cmd64*_dma_ops - drop "ide_" and "old_" infixes - s/hpt3xxx_dma_ops/hpt37x_dma_ops/ - s/hpt370x_dma_ops/hpt370_dma_ops/ - use correct DMA ops for HPT302/N, HPT371/N and HPT374 - s/it821x_smart_dma_ops/it821x_pass_through_dma_ops/ v3: * Two bugs slipped in v2 (noticed by Sergei): - use correct DMA ops for HPT374 (for real this time) - handle HPT370/HPT370A properly Acked-by: Sergei Shtylyov Signed-off-by: Bartlomiej Zolnierkiewicz --- drivers/ide/pci/cmd64x.c | 110 ++++++++++++++++++++++------------------------- 1 file changed, 52 insertions(+), 58 deletions(-) (limited to 'drivers/ide/pci/cmd64x.c') diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index 5411ded791bb..5fd252e6ed08 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c @@ -223,7 +223,7 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed) (void) pci_write_config_byte(dev, pciU, regU); } -static int cmd648_ide_dma_end (ide_drive_t *drive) +static int cmd648_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long base = hwif->dma_base - (hwif->channel * 8); @@ -239,7 +239,7 @@ static int cmd648_ide_dma_end (ide_drive_t *drive) return err; } -static int cmd64x_ide_dma_end (ide_drive_t *drive) +static int cmd64x_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = to_pci_dev(hwif->dev); @@ -256,7 +256,7 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive) return err; } -static int cmd648_ide_dma_test_irq (ide_drive_t *drive) +static int cmd648_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long base = hwif->dma_base - (hwif->channel * 8); @@ -279,7 +279,7 @@ static int cmd648_ide_dma_test_irq (ide_drive_t *drive) return 0; } -static int cmd64x_ide_dma_test_irq (ide_drive_t *drive) +static int cmd64x_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = to_pci_dev(hwif->dev); @@ -310,7 +310,7 @@ static int cmd64x_ide_dma_test_irq (ide_drive_t *drive) * event order for DMA transfers. */ -static int cmd646_1_ide_dma_end (ide_drive_t *drive) +static int cmd646_1_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); u8 dma_stat = 0, dma_cmd = 0; @@ -385,62 +385,33 @@ static u8 __devinit cmd64x_cable_detect(ide_hwif_t *hwif) } } -static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) -{ - struct pci_dev *dev = to_pci_dev(hwif->dev); - - if (!hwif->dma_base) - return; - - /* - * UltraDMA only supported on PCI646U and PCI646U2, which - * correspond to revisions 0x03, 0x05 and 0x07 respectively. - * Actually, although the CMD tech support people won't - * tell me the details, the 0x03 revision cannot support - * UDMA correctly without hardware modifications, and even - * then it only works with Quantum disks due to some - * hold time assumptions in the 646U part which are fixed - * in the 646U2. - * - * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. - */ - if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5) - hwif->ultra_mask = 0x00; - - switch (dev->device) { - case PCI_DEVICE_ID_CMD_648: - case PCI_DEVICE_ID_CMD_649: - alt_irq_bits: - hwif->ide_dma_end = &cmd648_ide_dma_end; - hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq; - break; - case PCI_DEVICE_ID_CMD_646: - if (dev->revision == 0x01) { - hwif->ide_dma_end = &cmd646_1_ide_dma_end; - break; - } else if (dev->revision >= 0x03) - goto alt_irq_bits; - /* fall thru */ - default: - hwif->ide_dma_end = &cmd64x_ide_dma_end; - hwif->ide_dma_test_irq = &cmd64x_ide_dma_test_irq; - break; - } -} - static const struct ide_port_ops cmd64x_port_ops = { .set_pio_mode = cmd64x_set_pio_mode, .set_dma_mode = cmd64x_set_dma_mode, .cable_detect = cmd64x_cable_detect, }; +static struct ide_dma_ops cmd64x_dma_ops = { + .dma_end = cmd64x_dma_end, + .dma_test_irq = cmd64x_dma_test_irq, +}; + +static struct ide_dma_ops cmd646_rev1_dma_ops = { + .dma_end = cmd646_1_dma_end, +}; + +static struct ide_dma_ops cmd648_dma_ops = { + .dma_end = cmd648_dma_end, + .dma_test_irq = cmd648_dma_test_irq, +}; + static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { { /* 0 */ .name = "CMD643", .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, + .dma_ops = &cmd64x_dma_ops, .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | IDE_HFLAG_ABUSE_PREFETCH, .pio_mask = ATA_PIO5, @@ -449,10 +420,10 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { },{ /* 1 */ .name = "CMD646", .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .chipset = ide_cmd646, .port_ops = &cmd64x_port_ops, + .dma_ops = &cmd648_dma_ops, .host_flags = IDE_HFLAG_ABUSE_PREFETCH, .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, @@ -460,9 +431,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { },{ /* 2 */ .name = "CMD648", .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, + .dma_ops = &cmd648_dma_ops, .host_flags = IDE_HFLAG_ABUSE_PREFETCH, .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, @@ -470,9 +441,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { },{ /* 3 */ .name = "CMD649", .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, + .dma_ops = &cmd648_dma_ops, .host_flags = IDE_HFLAG_ABUSE_PREFETCH, .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, @@ -487,12 +458,35 @@ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_devic d = cmd64x_chipsets[idx]; - /* - * The original PCI0646 didn't have the primary channel enable bit, - * it appeared starting with PCI0646U (i.e. revision ID 3). - */ - if (idx == 1 && dev->revision < 3) - d.enablebits[0].reg = 0; + if (idx == 1) { + /* + * UltraDMA only supported on PCI646U and PCI646U2, which + * correspond to revisions 0x03, 0x05 and 0x07 respectively. + * Actually, although the CMD tech support people won't + * tell me the details, the 0x03 revision cannot support + * UDMA correctly without hardware modifications, and even + * then it only works with Quantum disks due to some + * hold time assumptions in the 646U part which are fixed + * in the 646U2. + * + * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. + */ + if (dev->revision < 5) { + d.udma_mask = 0x00; + /* + * The original PCI0646 didn't have the primary + * channel enable bit, it appeared starting with + * PCI0646U (i.e. revision ID 3). + */ + if (dev->revision < 3) { + d.enablebits[0].reg = 0; + if (dev->revision == 1) + d.dma_ops = &cmd646_rev1_dma_ops; + else + d.dma_ops = &cmd64x_dma_ops; + } + } + } return ide_setup_pci_device(dev, &d); } -- cgit v1.2.3