From bce6f087a958a21500c51a9e63a5f578f5b0510c Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Wed, 25 Jun 2014 18:05:41 -0700 Subject: gpu: ipu-v3: Add ipu_idmac_clear_buffer() Add the reverse of ipu_idmac_select_buffer(), that is, clear a buffer ready status in a channel. Signed-off-by: Steve Longerbeam Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-common.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'drivers/gpu/ipu-v3') diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index fec72c0d18ba..773a2fc8fed4 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -357,6 +357,34 @@ void ipu_idmac_select_buffer(struct ipuv3_channel *channel, u32 buf_num) } EXPORT_SYMBOL_GPL(ipu_idmac_select_buffer); +void ipu_idmac_clear_buffer(struct ipuv3_channel *channel, u32 buf_num) +{ + struct ipu_soc *ipu = channel->ipu; + unsigned int chno = channel->num; + unsigned long flags; + + spin_lock_irqsave(&ipu->lock, flags); + + ipu_cm_write(ipu, 0xF0300000, IPU_GPR); /* write one to clear */ + switch (buf_num) { + case 0: + ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno)); + break; + case 1: + ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno)); + break; + case 2: + ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF2_RDY(chno)); + break; + default: + break; + } + ipu_cm_write(ipu, 0x0, IPU_GPR); /* write one to set */ + + spin_unlock_irqrestore(&ipu->lock, flags); +} +EXPORT_SYMBOL_GPL(ipu_idmac_clear_buffer); + int ipu_idmac_enable_channel(struct ipuv3_channel *channel) { struct ipu_soc *ipu = channel->ipu; -- cgit v1.2.3