From f657a9962070ae2502fcedf2c6568c393039d4c2 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Dec 2015 13:21:46 +0100 Subject: drm/exynos: mixer: refactor layer setup Properly configure blending properties of given hardware layer based on the selected pixel format. Currently only per-pixel-based alpha is possible when respective pixel format has been selected. Configuration of global, per-plane alpha value, color key and background color will be added later. This patch is heavily inspired by earlier work done by Tobias Jakobi . Signed-off-by: Marek Szyprowski Signed-off-by: Inki Dae --- drivers/gpu/drm/exynos/regs-mixer.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/exynos/regs-mixer.h') diff --git a/drivers/gpu/drm/exynos/regs-mixer.h b/drivers/gpu/drm/exynos/regs-mixer.h index dbdbc0af3358..7f22df5bf707 100644 --- a/drivers/gpu/drm/exynos/regs-mixer.h +++ b/drivers/gpu/drm/exynos/regs-mixer.h @@ -113,6 +113,7 @@ #define MXR_GRP_CFG_BLEND_PRE_MUL (1 << 20) #define MXR_GRP_CFG_WIN_BLEND_EN (1 << 17) #define MXR_GRP_CFG_PIXEL_BLEND_EN (1 << 16) +#define MXR_GRP_CFG_MISC_MASK ((3 << 16) | (3 << 20)) #define MXR_GRP_CFG_FORMAT_VAL(x) MXR_MASK_VAL(x, 11, 8) #define MXR_GRP_CFG_FORMAT_MASK MXR_GRP_CFG_FORMAT_VAL(~0) #define MXR_GRP_CFG_ALPHA_VAL(x) MXR_MASK_VAL(x, 7, 0) -- cgit v1.2.3