From d2069326d26c7de78e77a060fb6e6d0d21c35dbd Mon Sep 17 00:00:00 2001 From: Evgenii Krasnikov Date: Tue, 5 Apr 2022 10:59:27 -0400 Subject: drm/amd/display: Reset cached PSR parameters after hibernate [WHY] After hibernate system might be using old invalid psr_power_opt and psr_allow_active that never get reset [HOW] Reset cached Panel Self Refresh parameters when PSR is first configured for eDP in dc_link_setup_psr. Reviewed-by: Harry Vanzylldejong Acked-by: Tom Chung Signed-off-by: Evgenii Krasnikov Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/amd/display/dc/core/dc_link.c') diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 3d13ee32a3db..1eddf2785153 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -3317,9 +3317,14 @@ bool dc_link_setup_psr(struct dc_link *link, */ psr_context->frame_delay = 0; - if (psr) + if (psr) { link->psr_settings.psr_feature_enabled = psr->funcs->psr_copy_settings(psr, link, psr_context, panel_inst); + if (link->psr_settings.psr_feature_enabled) { + link->psr_settings.psr_power_opt = 0; + link->psr_settings.psr_allow_active = 0; + } + } else link->psr_settings.psr_feature_enabled = dmcu->funcs->setup_psr(dmcu, link, psr_context); -- cgit v1.2.3